Implementing Root Raised Cosine (RRC) filter for WCDMA using Xilinx

Abstract

This paper presents implementation of Root Raised Cosine (RRC) filter at transmitter of 3G-WCOMA wireless communication by using VHOL programming language on Field Programm able Logic Array (FPGA). The main objective of this project is to reduce the inter-symbol interference (lSI) which will affect the bandwidth required for transmission the data. MATLAB 7.0 is used to design RRC filter for generating filter coefficient and checking its functionality in WOCMA transmitter. Then RRC filter coding is generated by VHOL in XILINX application and being verified in Model Sim SE 6.3f before it being synthesized using Xilinx ISE Simulator. All the results produced will be verified for make a comparison.Ktywords-Pulse Shaping, Inter-symbol Interference, RRC Filter, Roll off Factor.