Implicit and explicit optimizations for stencil computations

Abstract

Stencil-based kernels constitute the core of many scientific applications on block-structured grids. Unfortunately, these codes achieve a low fraction of peak performance, due primarily to the disparity between processor and main memory speeds. We examine several optimizations on both the conventional cache-based memory systems of the Itanium 2, Opteron, and Power5, as well as the heterogeneous multicore design of the Cell processor. The optimizations target cache reuse across stencil sweeps, including both an implicit cache oblivious approach and a cache-aware algorithm blocked to match the cache structure. Finally, we consider stencil computations on a machine with an explicitlymanaged memory hierarchy, the Cell processor. Overall, results show that a cache-aware approach is significantly faster than a cache oblivious approach and that the explicitly managed memory on Cell is more efficient: Relative to the Power5, it has almost 2x more memory bandwidth and is 3.7x faster.

Data Layout Transformation for Stencil Computations on Short-Vector SIMD Architectures

“…A number of works have addressed optimizations of stencil computations on emerging multicore platforms [7], [16], [17], [6], [27], [26], [11], [37], [10], [4], [9], [40], [38], [41], [8], [39]. In addition, other transformations such as tiling of stencil computations for multicore architectures have been addressed in [43], [25], [21], [34].…”

Smashing: Folding Space to Tile through Time

“…Periodic domains have also been tiled using rhombus shaped tiles [5,8,10]. These tiles overlap at their bases, causing two tiles to compute some duplicate results.…”

“…These benefits can be enough to overcome the extra time spent recomputing a portion of the iterations. Overlapping tiles can also be used to handle wraparound dependencies that are introduced due to periodic boundaries [5,8]. The presented techniques could feasibly be extended to handle the ring, cylinder, and torus domains.…”

“…As such, after smashing, techniques such as overlapping tiles [5,8,10], which enable load-balanced parallelism, are applicable to the resulting iteration space.…”

“…The ring has been unrolled and discretized into a one-dimensional array. Notice the long, or wrap-around, dependencies going from iteration point (1,1) to (2,8) and (1,8) to (2,1). 1 Periodic domains arise from modeling hollow objects or shells.…”