1994
DOI: 10.1145/195291.182584
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Improved parallel architectural simulations on shared-memory multiprocessors

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Cited by 8 publications
(10 citation statements)
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“…The reason is the behavior of these types of simulati'ons. As has been observed in (Konas 1994, Soul6 1992, the most striking characteristic of architectural and logic-level simulations is the "clock" effect: peaks with considerable activity induced by the arrivals of the clock and of new input signals, followed by periods of diminishing activity as the signals propagate through the combinational elements of the simulatcd system. Thus, a scheduling queue implemented as a time-wheel that covers a simulated time interval equal to the clock period or to the propagation delay through a combinational circuit should be expected to achieve a constant O(1) access time.…”
Section: A Processor Self-scheduling Mecha-nismmentioning
confidence: 86%
See 3 more Smart Citations
“…The reason is the behavior of these types of simulati'ons. As has been observed in (Konas 1994, Soul6 1992, the most striking characteristic of architectural and logic-level simulations is the "clock" effect: peaks with considerable activity induced by the arrivals of the clock and of new input signals, followed by periods of diminishing activity as the signals propagate through the combinational elements of the simulatcd system. Thus, a scheduling queue implemented as a time-wheel that covers a simulated time interval equal to the clock period or to the propagation delay through a combinational circuit should be expected to achieve a constant O(1) access time.…”
Section: A Processor Self-scheduling Mecha-nismmentioning
confidence: 86%
“…In this way preference is given to locality management but load balancing is also taken into consideration. In synchronous PDES simulation, a logical process is activated when a new value arrives at its inputs and no event already exists in the input queue of the LP for that simulated time (Konas 1994). The activation of an LP results into its insertion in the scheduling queue of the processor that activated it.…”
Section: The Scheduling Queue Data Structurementioning
confidence: 99%
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“…Interconnection networks have been identified as suitable candidates for parallel simulation, e.g., see Goli et al (1989), Konas and Yew (1994), Miguel et al (1995), Nicol (1988), Yu, Towsley and Heidelberger (1989) and the references therein. Previous papers on this subject have typically modeled the networks at an abstract level, or modeled very simple networks.…”
Section: Introductionmentioning
confidence: 99%