Improved switched-capacitor interpolators with reduced sample-and-hold effects

Abstract

This paper proposes improved switched-capacitor (SC) interpolators using a novel sampling technique which eliminates the undesired distortion due to the sample-and-hold shaping effect at the lower input sampling rate. Such a sampling technique not only leads to a precise analog interpolation, as its digital counterpart does, but also allows to simplify the design procedures and resulting SC circuit implementations. Different circuit topologies with both finite-and infinite-impulse response characteristics are developed, respectively, for low-and high-selectivity filtering. Practical implementation issues are discussed with respect to capacitance ratio mismatches, as well as finite gain, bandwidth, and offset sensitivity effects of operational amplifiers. Besides detailed computer-based analyses, experimental results obtained from discrete component prototypes are also presented to demonstrate the proposed circuits.

A parasitic insensitive passive switched‐capacitor interpolation finite impulse response filter

“…Switched‐capacitor (SC) circuits as a favorable technique on behalf of all analog approaches are conducive to speed reduction of the digital core and digital‐to‐analog converters (DACs) and are efficient in terms of power and chip area compared with their digital counterpart . Among numerous papers presented to implement interpolation filters by using operational amplifiers outstand all those because they make good use of the inherent superiority of poly‐phase structure, which enables the circuit to operate at the lower rate . However, the high power consumption of active elements constrains designing low‐power applications.…”

A high-speed frequency up-translated SC bandpass filter with auto-zeroing for DDFS systems

“…The nonrecursive Active-Delay Block (ADB) polyphase-based SC interpolation structure [4] is suitable and employed for this FIR filtering whose block diagram is shown in the Fig.2. The core of the filter is composed by a mixed serial-parallel ADB delay line and 4 parallel polyphase filters.…”

“…This can be achieved by the recently proposed improved multirate polyphase-based interpolation structures. which will recover such sin SLY shaping gain errors over the entire frequency axis[4]. consequently allowing an extra degree of freedom for designers to assign both the passband and stopband frequency.…”

An SC CCIR-601 video restitution filter with 13.5 Msample/s input and 108 Msample/s output

“…The circuit employs 3-stage multirate-FIR-polyphasebased structures [7] to achieve linear-phase, reduced sampled-and-hold shaping distortion and relaxed speed need for OTA's as well as minimized capacitance spread. The overall 3-stage circuit structure is presented in Fig.1.…”

“…With the employment of 2-parallel polyphase structure plus also double-sampling in each stage, their OTA speed is significantly relaxed, thus maximizing the power saving. Special mismatch-free SC multiplexers [7] are employed for interfacing different stages and providing enough driving capability, and they are actually not the powerhungry one due to the increased feedback factor and reduced slew rate requirements, even through they operate at higher output sampling rate. Fully-differential structures are utilized for reducing common-mode noise coupling especially from the multiple clock generator.…”