Improved Target Impedance for Power Distribution Network Design With Power Traces Based on Rigorous Transient Analysis in a Handheld Device

Kim, Jingook; Takita, Yuzo; Araki, Kiyomichi; Fan, Jun

doi:10.1109/tcpmt.2012.2232353

Cited by 31 publications

References 14 publications

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Practical approach to power integrity‐driven design process for power‐delivery networks

Ko¹,

Kim

Ryoo

et al. 2016

IET Circuits, Devices & Systems

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The authors present a practical design process that considers the power noise problem in CPU blocks for application processors used in smart TVs. The target impedance is determined by modelling the RLC circuit of a system-on-chip power net. The target impedance of a power delivery network is then determined by applying the extracted chip current profile for finalising the design budget. The authors modelled the on-chip power net by combining vector network analyser measurements with an on-chip model for power integrity analysis. The authors demonstrated the optimisation and design strategy by using a ball grid array ball interconnection and case studies on the placement of multilayer ceramic capacitors. The simulation results showed good agreement with the measurement results. The error in the minimum value (negative direction) by voltage droop was less than 8.6%, while the difference in voltage noise ripple was 2.69% for a criterion of 1.1 V assuming a worst-case condition of 1.2 V.

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Practical approach to power integrity‐driven design process for power‐delivery networks

Ko¹,

Kim

Ryoo

et al. 2016

IET Circuits, Devices & Systems

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Computation of Maximum Voltage Droop in Power Delivery Networks

2020

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Computation of maximum voltage droop in power delivery networks is important for performance estimation. This paper proposes a methodology to predict the maximum voltage droop caused by current sources in ICs. We derive the analytical relations and analyze the error in the predicted voltage droop values. Furthermore, we consider the effect of current step rise time on the voltage droop along with error analysis. Results capture the error bounds for the analytical equations derived.INDEX TERMS Integrated circuit (IC), maximum voltage droop, power delivery network (PDN)

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Estimating frequency spectrum of IC power supply current through time-domain voltage measurement on power distribution network

Zhang

Chua

See

et al. 2017

2017 Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC)

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Improved Target Impedance for Power Distribution Network Design With Power Traces Based on Rigorous Transient Analysis in a Handheld Device

Cited by 31 publications

References 14 publications

Practical approach to power integrity‐driven design process for power‐delivery networks

Practical approach to power integrity‐driven design process for power‐delivery networks

Computation of Maximum Voltage Droop in Power Delivery Networks

Estimating frequency spectrum of IC power supply current through time-domain voltage measurement on power distribution network

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