Improvement of charge-to-breakdown distribution by fluorine incorporation into thin gate oxides

Negative bias temperature instability: What do we understand?

“…Fluorine atoms release the distortion at the SiO 2 /Si interface. Interface-state generation for fluorinated oxides under Fowler-Nordheim stress is suppressed and one might suspect that this also applies to NBTI [31]. NBTI has also been observed in high-K dielectrics.…”

Fluorine Effects on NMOS Characteristics and DRAM Refresh

“…Converting the concentration to dosage is about the range of 4 × 10 15 ~ 2 × 10 16 (cm -2 ). As a higher fluorine concentration induces a thicker gate oxide [2], the V TH becomes higher. However, this model cannot be applied to the short channel transistors because the values of V TH are the same.…”

“…For the commonly used polycide process, fluorine is inadvertently introduced into the gate oxide from WSix deposition using WF 6 gas. The effects of fluorine have been studied intensively such as reliability issues [1][2][3], device performance [4,5], and the physical properties of gate oxide [6]. However, few studies have focused on the fluorine effect as the function of the channel length.…”

Improved electrical characteristics of TaN/Al2O3/In0.53Ga0.47As metal-oxide-semiconductor field-effect transistors by fluorine incorporation

“…1 Various high dielectric constant ͑high ͒ materials have been studied, including in situ molecular beam epitaxy deposition of Ga 2 O 3 -Gd 2 O 3 mixture or Gd 2 O 3 on GaAs and InGaAs substrates, 2-4 silicon or germanium as interfacial passivation layer between GaAs, InP, or InGaAs substrates and dielectrics, [5][6][7][8] and atomic layer deposition ͑ALD͒ of Al 2 O 3 , HfO 2 , and ZrO 3 directly on III-V substrates. [9][10][11] Recently, fluorine ͑F͒ incorporation into the high gate dielectric has been shown to improve device performance and reliability on Si substrate [12][13][14] and Ge substrate. 15 Seo et al 13 incorporated F into high gate dielectric by F 2 annealing in the presence of UV radiation, passivating high bulk and high / Si interface defects.…”

“…15 Seo et al 13 incorporated F into high gate dielectric by F 2 annealing in the presence of UV radiation, passivating high bulk and high / Si interface defects. Mitani et al 14 introduced F into gate dielectrics by F implantation and followed by annealing. Moreover, F can be incorporated by CF 4 plasma treatment before or after gate dielectric deposition.…”