Improvement on short-circuit ability of SiC super-junction MOSFET with partially widened pillar structure

Abstract

In this article, a novel 1200 V SiC super-junction (SJ) MOSFET with a partially widened pillar structure is proposed and investigated by using the two-dimensional numerical simulation tool. Based on the SiC SJ MOSFET structure, a partially widened P-region is added at the SJ pillar region to improve the short-circuit (SC) ability. After investigating the position and doping concentration of the widened P-region, an optimal structure is determined. From the simulation results, the SC withstand times (SCWT) of the conventional trench MOSFET (CT-MOSFET), the SJ MOSFET, and the proposed structure at 800 V DC bus voltage are 15 μs, 17 μs, and 24 μs, respectively. The SCWT of the proposed structure increased by 60 % and 41.2 % in comparison with that of the other two structures. The main reason for the proposed structure with an enhanced SC capability is related to the effective suppression of saturation current at the high DC bias conditions by using a modulated P-pillar region. Meanwhile, a good Baliga’s FOM (BV 2/R on) also can be achieved in the proposed structure due to the advantage of the SJ structure. In addition, the fabrication technology of the proposed structure is compatible with the standard epitaxy growth method used in the SJ MOSFET. As a result, the SJ structure with this feasible optimization skill presents an effect on improving the SC reliability of the SiC SJ MOSFET without the degeneration of the Baliga’s FOM.

A Novel Super-Junction DT-MOS with Floating p Regions to Improve Short-Circuit Ruggedness

“…Since the SJ structure is formed of multiple epitaxy layer growth and ion implantation [11,25,26], the SJ process is compatible with the floating p region's process. Figure 12 shows the formation of the SJ structure and floating p regions using multilayer epitaxy and ion implantation techniques.…”

“…At the moment of short-circuit, the device needs to withstand high voltage and current. If the short-circuit capability of the device is inadequate, the performance of the device will be degraded, or even burned [11]. Therefore, the shortcircuit reliability of devices has widely been a concern of researchers.…”

A TCAD Simulation Study on the Short-circuit Performance of 650V P-pillar Offset Super-junction MOSFET

“…The SC capability requirement for a 650 V MOSFET is the SCWT greater than 10 μs at 400 V DC bus voltage. However, a few studies focus on enhancing the withstanding ability of SC of SJ-MOSFET through improving the structure of device [8].…”