A reliable circuit configuration is described for stacking power metal-oxide semiconductor field effect transistors (MOSFETs). The resulting circuit has a hold off voltage N times larger than a single power MOSFET, where N is the number of power MOSFETs used. The capability to switch higher voltages and thus greater amounts of power, into a 50 n load, in approximately the same time as a single device is realized. Design considerations are presented for selecting a power MOSFET. Using the design method presented, a 1.4 kV pulse generator, into SO n, with a 2 ns rise time and negligible jitter is designed.