Improvements in the Noise Theory of the MMIC Distributed Amplifiers

Hamidi, Emad; Mohammad-Taheri, Mahmoud; Moradi, Gholamreza

doi:10.1109/tmtt.2008.927310

Cited by 5 publications

(2 citation statements)

References 13 publications

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“…[23][24][25] Subsequently, methods for the DA noise figure (NF) calculation were developed. [26][27][28] When designers started using the various lengths of TLs between DA sections, a need for an effective method of determining their optimal lengths arose. 29 Increased requirements for the dynamic characteristics of DAs, in particular, output power and poweradded efficiency, led to non-uniform DAs and, as a result, the techniques for determining optimal load impedances and transistor peripheries for each section of DA.…”

Section: Introductionmentioning

confidence: 99%

“…The very first techniques enabled determining the optimal transistor periphery, the number of sections, and the input and output TL inductances for the classical DA schematic 23–25 . Subsequently, methods for the DA noise figure ( NF ) calculation were developed 26–28 . When designers started using the various lengths of TLs between DA sections, a need for an effective method of determining their optimal lengths arose 29 .…”

Section: Introductionmentioning

confidence: 99%

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A genetic‐algorithm‐based synthesis of microwave integrated distributed amplifiers

Metel

Добуш

Kalentyev

et al. 2023

Int J Numerical Modelling

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This article presents a genetic algorithm‐based technique for microwave integrated distributed amplifier synthesis. To speed‐up synthesis, only linear characteristics are used in the goal function. The technique uses MMIC foundry process design kit models providing manufacturing‐ready schematics to be found. The models from the process design kit are presented as S‐parameters again to enhance algorithm performance. The technique allows searching among most of the existing schematics of the microwave distributed amplifier but is not limited to typical topologies. The section number is theoretically unlimited and makes it possible to find principally new circuit topology. The synthesis shortens and simplifies the distributed amplifier design time. Experimental validation of the technique is carried out by synthesizing the broadband driver stage for the 20–30 GHz buffer amplifier. The technique produces several amplifier topologies meeting the requirements. The most appropriate circuit was manufactured using a commercial 0.25 μm GaAs pHEMT process. The manufactured buffer amplifier demonstrates a gain of 10 dB and 20 dBm output power at a 1 dB compression point.

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