Improvements in the synaptic operations of ferroelectric field-effect transistors using Hf_0.5Zr_0.5O₂ thin films controlled by oxygen partial pressures during the sputtering deposition process

Abstract

Synaptic operations of metal–ferroelectric–metal–insulator–semiconductor (MFMIS) field-effect transistors using HfxZr1−xO2 thin films were successfully demonstrated and optimized by controlling oxygen partial pressure during sputtering deposition.

Enhanced analog synaptic behavior of SiNx/a-Si bilayer memristors through Ge implantation

“…In many studies, PCM has been demonstrated to act as analog synapses due to its high speed and good scalability, but the inherently high nonlinearity of the synapse weight update, especially in depression, poses a challenge to the implementation of ideal analog behavior 11 . An FeFET is another promising solution to achieve high linearity of the synapse weight update because the device conductance is modulated through a gate electrode that does not interfere with a current-conducting channel 12,13 . However, the implementation of FeFETs using conventional perovskite-type oxide materials finds difficulty in securing CMOS process compatibility 14,15 .…”

Flexible Quasi‐van der Waals Ferroelectric Hafnium‐Based Oxide for Integrated High‐Performance Nonvolatile Memory

“…[ 7 ] Oxygen vacancy engineering, such as optimizing electrode and exploring sputtering‐deposition technique, can be utilized to thoroughly suppress the wake‐up effect. [ 28 ] As shown in Figure 2h, no wake‐up effect is observed during the cycling, and the P r changes little when the device is cycled less than 10 5 times. Further cycling after that leads to a reduction of P r corresponding to the fatigue phenomenon, which can be attributed to newly generated oxygen‐vacancy defects during the cycling.…”

“…showed compensation of oxygen vacancies into HZO films through increasing oxygen partial pressure during sputtering deposition process, and achieved a suppression of the ferroelectric O− phase. [ 28 ] Moreover, excess oxygen vacancies are associated to polarization fatigue owing to the increase of leakage current. As a result, oxygen vacancies in multiphase HZO films have complex effects on the ferroelectric polarization.…”

Fabrication Strategies of Metal–Ferroelectric–Insulator–Silicon Gate Stacks Using Ferroelectric Hf–Zr–O and High-k HfO2 Insulator Layers for Securing Robust Ferroelectric Memory Characteristics

“…Ferroelectric field-effect transistors (FeFETs) utilizing HfO 2 -based ferroelectrics have attracted considerable attention as one of the promising advanced nonvolatile memory devices (NVMs) due to their prospective advantages such as excellent compatibility with complementary metal oxide semiconductor (CMOS) technology, low operation voltage, and fast program/erase speeds. − Synaptic devices and steep-slope negative capacitance transistors can also be implemented by modulating the gate stack structures of the FeFETs. − These novel device functions are based on the ferroelectric nature of the HfO 2 -based thin films, which are initiated by the formation of a polar orthorhombic phase ( o -phase) with a noncentrosymmetric space group Pca 2 1 . , However, a ferroelectric o -phase should be stabilized by various additional methodologies such as doping process, strain engineering, and film thickness control. − In particular, for the doping process, the incorporation of cation dopants with smaller ionic radius than Hf ion into the HfO 2 crystal lattices facilitates the phase transformation from the tetragonal phase ( t -phase) to o -phase . Although excellent ferroelectricity of Al-doped HfO 2 (Al/HfO 2 ) or Si-doped HfO 2 (Si/HfO 2 ) thin films has previously been demonstrated, sophisticated process conditions were required to be established for the employment of these dopants owing to the narrow process margins in terms of annealing conditions and interfacial strain for securing the outstanding ferroelectric behaviors. , Alternatively, Hf 1– x Zr x O 2 (HZO) ferroelectrics have been featured to have wide process margins without the additional incorporation of interfacial strain for various ferroelectric device applications. , …”