2018 IEEE 19th Latin-American Test Symposium (LATS) 2018
DOI: 10.1109/latw.2018.8349665
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Improving approximate-TMR using multi-objective optimization genetic algorithm

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Cited by 12 publications
(15 citation statements)
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“…Various approximate/inexact TMR schemes have been proposed at the logic level [6], [7], [8]. They mainly aim at reducing the area required by the hardened circuit by tradingoff the precision of the detection/mitigation scheme.…”
Section: Related Workmentioning
confidence: 99%
“…Various approximate/inexact TMR schemes have been proposed at the logic level [6], [7], [8]. They mainly aim at reducing the area required by the hardened circuit by tradingoff the precision of the detection/mitigation scheme.…”
Section: Related Workmentioning
confidence: 99%
“…Several approaches defined approximate hardening schemes at the logic level, by enhancing TMR (e.g. [8], [9], [15]), or DWC (e.g., [16], [17]) or focusing on the specific voter/checker component [18]. The focus is on a combinational function having a single-bit output; the basic strategy these works adopt is to approximate the redundant circuit to minimize its area while limiting the error rate, i.e., the percentage of not detected/mitigated faults.…”
Section: Related Workmentioning
confidence: 99%
“…the of the nominal application. To reduce this impact, AC has been exploited to reduce the replica's computations in redundancy-based fault mitigation schemes, such as approximate/inexact Triple Modular Redundancy (TMR) [8], [9], [10], or fault detection ones [11], [12]. Common denominator to all these approaches is performing error checking/mitigation at the granularity of the single logic or scalar value, instead of considering the quality of the entire output image/signal as a whole to decide whether to trigger a re-execution or not.…”
Section: Introductionmentioning
confidence: 99%
“…Experimental results obtained for several combinational circuits demonstrated that the evolutionary approach can produce better solutions, but the probabilistic approach is close. In the followup work, Albandes et al [21] propose another approach. GA has to find replacements for some gates according to a predefined library that specifies what transformations are valid for each logic gate.…”
Section: A Gate Level Approximationsmentioning
confidence: 99%