Improving Conditional Branch Prediction on Speculative Multithreading Architectures

Iwama, Chitaka; Barli, Niko Demus; Sakai, Shuichi; Tanaka, Hidehiko

doi:10.1007/3-540-44681-8_60

Cited by 4 publications

(2 citation statements)

References 12 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Speculative multithreading [3] was proposed for it and there are several techniques for efficient speculation [4]. In addition to the control speculation, value predictions and memory speculations are the new important techniques.…”

Section: How To Achievementioning

confidence: 99%

CMP on SoC

Sakai

2002

Proceedings of the 15th International Symposium on System Synthesis - ISSS '02

Self Cite

View full text Add to dashboard Cite

show abstract

Section: How To Achievementioning

confidence: 99%

CMP on SoC

Sakai

2002

Proceedings of the 15th International Symposium on System Synthesis - ISSS '02

Self Cite

View full text Add to dashboard Cite

show abstract

“…They also did not solve the problems encountered with the discontinuity in global history in a Speculative Multithreaded environment. The studies and experiments done by Iwama et al[19] was probably the first step towards addressing this issue. Their analysis looks at a very basic implementation of effective branch predictors that includes the hybrid predictors used for single thread applications and how they can be used to get around the discontinuities associated with global history.…”

mentioning

confidence: 99%

Broadcast Mechanism for improving Conditional Branch Prediction in Speculative Multithreaded Processors

Retnamma¹

2000

View full text Add to dashboard Cite

Many aspects of speculative multithreading have been under constant and crucial research in the recent times with the increased importance in exploiting parallelism in single thread applications. One of the important architectural optimizations that is very pertinent in this scenario is branch prediction. Branch Prediction assumes increased importance for multi-threading systems that execute threads speculatively, since wrong predictions can be much costlier here, in terms of threads, than a few instructions that occupy the pipeline in a uni-processor. Conventional branch prediction techniques have provided increasingly better prediction accuracies for uni-core processing. But the branch prediction itself takes on a whole new dimension when applied to multi-core architectures based on Speculative Multithreading. Dependence on global branch history has helped branch predictors to achieve high prediction accuracy in single thread applications. The discontinuity of global history created at the thread boundaries cripple the performance of branch predictors in a multi-threaded environment. Many studies in the past have tried to address the branch history problem to improve the prediction accuracy. Most of these have been found either to be architecture specific or complex in terms of the hardware needed to recreate or ii approximate the right history to be given to the threads when they start executing out of order. This hardware overhead increases as the number and size of threads increase thereby limiting the scalability of the algorithms proposed so far. The current thesis takes a different direction and proposes a simple and scalable solution to effectively reduce the misprediction rates in Speculative Multithreaded systems. This is accomplished by making use of a synergistic interaction between threads to boost the inherent biased nature of branches and using less complex hardware to reduce aliasing between branches in the threads. The study proposes a new scheme called the Global Broadcast Buffer scheme to effectively reduce branch mispredictions in Speculative Multithreaded architectures. iii Dedicated to my parents Thankappan and Retnamma iv Acknowledgements I thank my guide Prof. Haitham Akkary for giving me the right direction and focus throughout the thesis work. I am grateful to my advisor Dr. Douglas V Hall, who at every stage of the thesis, made sure that I was on track by checking the status and giving the right advice. He gave me invaluable insight and tips in achieving perfection in the work done. I thank the thesis committee members Dr. Dan Hammerstrom and Dr. Christof Teuscher for providing valuable feedback and suggestions on my work. Without the presence of support of my friends Komal Jothi, Manjith, Vishwa, Vinay, Srini, Naveen Balasingam and Arun Veera I would not have been able to accomplish this task. Viswesh, Ptd, Rosh and Madhu, who have been a constant source of encouragement, kept their faith in me time and again throughout this research work. They deserve more than a thank you. Finally I...

show abstract

Dynamically Spawning Speculative Threads to Improve Speculative Path Execution

Zhao

Tao

2014

Algorithms and Architectures for Parallel Processing

View full text Add to dashboard Cite

Improving Conditional Branch Prediction on Speculative Multithreading Architectures

Cited by 4 publications

References 12 publications

CMP on SoC

CMP on SoC

Broadcast Mechanism for improving Conditional Branch Prediction in Speculative Multithreaded Processors

Dynamically Spawning Speculative Threads to Improve Speculative Path Execution

Contact Info

Product

Resources

About