Improving last level shared cache performance through mobile insertion policies (MIP)

Abad, Pablo; Prieto, Pablo; Puente, Valentín; Gregorio, J.A.

doi:10.1016/j.parco.2015.06.002

Cited by 4 publications

(1 citation statement)

References 29 publications

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“…In this policy, set 0 is selected from the first region, 1 from the second region, 2 from the third, and so on. In a multi-banked LLC, this process is done for each cache bank [Abad et al 2015]. We illustrate the policy in Figure 3, where set 0 of region 1, set 1 from region 2, until set N from the last region is mapped to the sampling cache.…”

Section: Sampling the Llcmentioning

confidence: 99%

DyCa: Dynamically Adaptable Cache Bypassing Mechanism

Carmin¹,

Santos²,

Alves³

2022

Anais Do XXIII Simpósio Em Sistemas Computacionais De Alto Desempenho (SSCAD 2022)

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As the number of cores increases, more cores and threads share the Last-Level Cache (LLC), which consumes a large portion of the chip’s total power and area. Therefore, sophisticated solutions must guarantee the best resource usage addressing cache conflicts and cache pollution problems. This work exploits the knowledge that many applications present poor temporal and spatial locality. Thus, an adaptive cache mechanism can benefit such applications, improving general system performance and decreasing energy consumption. In this paper, we propose an online and application-aware predictor to adapt the use of LLC. As a result, DyCa shows up to 22% and 21% performance increases in single and multi-program workloads, respectively.

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Section: Sampling the Llcmentioning

confidence: 99%