Improving Model Checking with Context Modelling

The Context-aware approach has proven to be an effective technique for software model-checking verification. It focuses on the explicit modelling of environment as one or more contexts. In this area, specifying precise requirement is a challenged task for engineer since often environmental conditions lack of precision. A DSL, called CDL, has been proposed to facilitate the specification of requirement and context. However, such language is still low-level and error prone, difficult to grasp on complex models and assessment about its usability is still mitigated. In this paper, we propose a high level formalism of CDL to facilitate specifying contexts based on interaction overview diagrams that orchestrate activity diagrams automatically transformed from textual use cases. Our approach highlights the boundaries between the system and its environment. It is qualified as model-checking context-aware that aims to reduce the semantic gap between informal and formal requirements, hence the objective is to assist and encourage engineers to put sufficient details to accomplish effectively the specification process.

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“…For more description of CDL language, see the published articles [7,8,9] available on http: //www.obpcdl.org…”

Section: European Alliance For Innovationmentioning

confidence: 99%

“…In this area, contextaware verification has been introduced [6,7] as a technique of state space decomposition that enables compositional verification of requirements. The idea is to allow to explicit separately the behaviour of entities (actors) that interact with the system and its environment.…”

Section: Introductionmentioning

confidence: 99%

Context-aware approach for formal verification

Benabbou¹,

Bahloul²,

Philippe³

2016

EAI Endorsed Transactions on Context-aware Systems and Applicat

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“…Another problem of verification on the level of the implementation language is the lack of language abstractions for specifying environments [36,14]. The environment is the code (or more generally, a system) with which the system under verification (SUV) interacts; in particular the environment may represent the relevant aspects of the real world in which the SUV is designed to operate.…”

Section: Listing 1: Sample Pacing Logic Implementation In Cmentioning

confidence: 99%

“…Such environments are usually nondeterministic (e.g., the heart may or may not beat at any given time) and constrained (i.e., the behavior is somehow bounded, usually as a consequence of characteristics of the real world; for example, there are physical limits as to how fast a human heart can beat). A well-defined environment can reduce the number of spurious counterexamples, and speed up the verification as a consequence of state space reduction [14]. Finally, assuming the verification conditions and the environment have been specified, the question remains of how to integrate them with the SUV to perform the verification.…”

Section: Listing 1: Sample Pacing Logic Implementation In Cmentioning

confidence: 99%

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Automated domain-specific C verification with mbeddr

Molotnikov

Völter²,

Ratiu

2014

Proceedings of the 29th ACM/IEEE International Conference on Automated Software Engineering

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When verifying C code, two major problems must be addressed. One is the specification of the verified systems properties, the other one is the construction of the verification environment. Neither C itself, nor existing C verification tools, offer the means to efficiently specify application domain-level properties and environments for verification. These two shortcomings hamper the usability of C verification, and limit its adoption in practice. In this paper we introduce an approach that addresses both problems and results in user-friendly and practically usable C verification. The novelty of the approach is the combination of domainspecific language engineering and C verification. We apply the approach in the domain of state-based software, using mbeddr and CBMC. We validate the implementation with an example from the Pacemaker Challenge, developing a functionally verified, lightweight, and deployable cardiac pulse generator. The approach itself is domain-independent.

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Past‐Free[ze] reachability analysis: reaching further with DAG‐directed exhaustive state‐space analysis

Teodorov

LeźRoux

Drey

et al. 2016

Software Testing Verif & Rel

Self Cite

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International audienceModel-checking enables the automated formal verification of software systems through the explicit enumeration of all the reachable states. While this technique has been successfully applied to industrial systems, it suffers from the state-space explosion problem because of the exponential growth in the number of states with respect to the number of interacting components. In this paper, we present a new reachability analysis algorithm, named Past-Free[ze], that reduces the state-space explosion problem by freeing parts of the state-space from memory. This algorithm relies on the explicit isolation of the acyclic parts of the system before analysis. The parallel composition of these parts drives the reachability analysis, the core of all model-checkers. During the execution, the past states of the system are freed from memory making room for more future states. To enable counter-example construction, the past states can be stored on external storage. To show the effectiveness of the approach, the algorithm was implemented in the OBP Observation Engine and was evaluated both on a synthetic benchmark and on realistic case studies from automotive and aerospace domains. The benchmark, composed of 50 test cases, shows that in average, 75% of the state-space can be dropped from memory thus enabling the exploration of up to 14 times more states than traditional approaches. Moreover, in some cases, the reachability analysis time can be reduced by up to 25%. In realistic settings, the use of Past-Free[ze] enabled the exploration of a state-space 4.5 times larger on the automotive case study, where almost 50% of the states are freed from memory. Moreover, this approach offers the possibility of analyzing an arbitrary number of interactions between the environment and the system-under-verification; for instance, in the case of the aerospace example, 1000 pilot/system interactions could be analyzed unraveling an 80 GB state-space using only 10 GB of memor

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Improving Model Checking with Context Modelling

Cited by 17 publications

References 32 publications

Context-aware approach for formal verification

Context-aware approach for formal verification

Automated domain-specific C verification with mbeddr

Past‐Free[ze] reachability analysis: reaching further with DAG‐directed exhaustive state‐space analysis

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