Improving Planar Transformers for <i>LLC</i> Resonant Converters: Paired Layers Interleaving

Saket, Mohammad Ali; Ordonez, Martin; Craciun, Marian; Botting, Chris

doi:10.1109/tpel.2019.2903168

Cited by 55 publications

(31 citation statements)

References 39 publications

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“…3) Paired Layers Interleaving CM noise is propagated by large parasitic capacitances between primary and secondary layers of the PTs, thereby causing EMI problems. The improved winding method in [63] is designed to overcome CM noise and unwanted resonant frequency in LLC PTs. The proposed method would help make LLC converters slim, flat, and high-power density by eliminating the need for bulky CM chokes.…”

Section: ) Fully Interleavedmentioning

confidence: 99%

“…In addition, the novel winding method offers low inductance and ac resistivity, also crucial characteristics for high-efficiency transformers. The main cause for CM noise in LLC transformers and a comprehensive approach that targets all sources of CM noise in a transformer has been discussed in [63]. The goal of this approach is to eliminate CM noise to almost zero by identifying where it originates.…”

Section: ) Fully Interleavedmentioning

confidence: 99%

“…11(a) where two layers that operate separately (from the primary and the secondary) cross one another.A model of electrostatic behavior can be constructed based on six capacitors, as shown in Fig. 11(b) (with each terminal having a capacitor between them) [63]. The total generated CM noise between these layers can be determined by summing up the currents in capacitors C ac , C ad , C bc , and C bd (CM noise is not contributed to by capacitors C ab and C cd because they are in the same winding).…”

Section: ) Fully Interleavedmentioning

confidence: 99%

See 2 more Smart Citations

A Comprehensive Review on Planar Magnetics and the Structures to Reduce the Parasitic Elements and Improve Efficiency

Kolahian¹,

Grimm²,

Baghdadi³

2022

Preprint

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<p>Due to the necessity for highly efficient and compact power electronic converters to operate at higher frequencies, traditional wire-wound magnetics are not suitable. A comprehensive review of planar magnetic technologies is provided in this paper, which discusses the advantages as well as the disadvantages that can be associated with them. An extensive review of research literature is presented with the purpose of suggesting models for planar magnetics. Several strategies are presented to overcome the shortcomings of planar magnetics, such as winding conduction loss, leakage inductance, and winding capacitance. The purpose of this study is to provide engineers and researchers with a clear roadmap to designing planar magnetic devices. </p>

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Section: ) Fully Interleavedmentioning

confidence: 99%

Section: ) Fully Interleavedmentioning

confidence: 99%

Section: ) Fully Interleavedmentioning

confidence: 99%

See 1 more Smart Citation

A Comprehensive Review on Planar Magnetics and the Structures to Reduce the Parasitic Elements and Improve Efficiency

Kolahian¹,

Grimm²,

Baghdadi³

2022

Preprint

View full text Add to dashboard Cite

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“…Δi max (25) B op ≤ B sat (26) If the ( 26) cannot be realized, go to step1 and choosing another material for the core.…”

Section: Design Procedures Of Pt Compensatormentioning

confidence: 99%

“…According to Equation (), by increasing distance d, decreasing A t , reducing the number of intersections k , and using the low dielectric

ε_{r}

, the inter‐winding capacitance (capacitance between different PCBs) can be minimized. Although increasing distance d can reduce the capacitance, it increases losses due to reduction of the copper space and the increase of the insulation space [26]. Decreasing A t increases AC resistance due to the high proximity effect.…”

Section: Proposed Optimum Structure Of Pt Compensatormentioning

confidence: 99%

A passive compensator for imbalances in current sharing of parallel‐siC MOSFETs based on planar transformer

Sarfejo

Allahyari

Bahrami

et al. 2021

IET Power Electronics

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SiCMOSFETs are widely employed in power converters due to their high switching speed and low switching loss. However, their low current rating due to the limited active area restricts their high power applications. To apply SiC MOSFETs in high power applications, providing parallel connection is an inevitable choice. To tackle the challenge of imbalanced current sharing problem between parallel SiC MOSFETs, a new passive compensator based on planar transformer (PT) is proposed here. Compared with the conventional transformer compensators, parasitic elements are adjustable and predictable in PT compensators, which is especially important for mass production aims. After explaining the concept of the physical operation of the PT compensator, the whole parasitic elements of the PT compensator are formulated. Based on estimated parasitic elements and using the finite element method (FEM), an optimum PT structure is extracted for imbalances in current sharing of parallel SiC MOSFETs. Afterward, the PT design is discussed in detail and then, a boost converter is constructed. Finally, the experimental results are presented to verify the reliability, accuracy, and effectiveness of the theoretical results.

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A new winding structure with low common‐mode current in input series output parallel planar transformer LLC converter

Tang,

Jia

2024

Circuit Theory & Apps

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MHz switches and integrated magnetic planar transformers (PT) promote the high density and miniaturization of DC/DC converters. The parasitic parameters of the PT at high frequency significantly affect the performance of converters, resulting in severe electromagnetic interference (EMI) problems. Firstly, this paper proposes a new common‐mode (CM)‐suppression winding structure for the input series output parallel (ISOP) matrix transformer LLC converter. The sources and conduction principle of CM noise are analyzed. Furthermore, this optimization based on winding shape and position is simple and feasible, suppressing the CM noise significantly. Compared with conventional multilayer winding structure, this optimization increases the current‐carrying area by 2.8%–5.9%, effectively improving the primary current distribution. In addition, the proposed structure makes the best planar windings in footprint with expanded windings, bringing the simplest layout in the primary winding. Finally, a 1 MHz 400 V/12 V 300 W LLC converter is constructed to verify the effect of this winding structure. The results show that a 40% reduction in CM current can be achieved while maintaining the current balance.

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Improving Planar Transformers for LLC Resonant Converters: Paired Layers Interleaving

Cited by 55 publications

References 39 publications

A Comprehensive Review on Planar Magnetics and the Structures to Reduce the Parasitic Elements and Improve Efficiency

A Comprehensive Review on Planar Magnetics and the Structures to Reduce the Parasitic Elements and Improve Efficiency

A passive compensator for imbalances in current sharing of parallel‐siC MOSFETs based on planar transformer

A new winding structure with low common‐mode current in input series output parallel planar transformer LLC converter

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