Improving RO-PUF quality on FPGAs by incorporating design-dependent frequency biases

Feiten, Linus; Martin, Tobias; Sauer, Matthias; Becker, Bernd

doi:10.1109/ets.2015.7138749

Cited by 7 publications

(4 citation statements)

References 11 publications

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“…In [11], the local randomness is distilled by modeling and subtracting the systematic variation. A similar technique is to subtract the averaged frequency from multiple measurements to reveal the true local random variation [12]. However, the calculation and information storage requirement come with the cost of addition latency and hardware.…”

Section: B Techniques To Improve Parametric Puf Qualitymentioning

confidence: 99%

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Design and Analysis of Stability-Guaranteed PUFs

Wang

Yona

Diggavi

et al. 2018

IEEE Trans.Inform.Forensic Secur.

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Abstract-The lack of stability is one of the major limitations that constrains Physical Unclonable Function (PUF) from being put in widespread practical use. In this paper, we propose a weak PUF and a strong PUF that are both completely stable with 0% intra-distance. These PUFs are called Locally Enhanced Defectivity Physical Unclonable Function (LEDPUF). The source of randomness of a LEDPUF is extracted from locally enhance defectivity without affecting other parts of the chip. A LEDPUF is a pure functional PUF that does not require helper data, fuzzy comparator, or any kinds of correction schemes as conventional parametric PUFs do. A weak LEDPUF is constructed by forming arrays of Directed Self Assembly (DSA) random connections is presented, and the strong LEDPUF is implemented by using the weak LEDPUF as the key of a keyed-hash message authentication code (HMAC). Our simulation and statistical results show that the entropy of the weak LEDPUF bits is close to ideal, and the inter-distances of both weak and strong LEDPUFs are about 50%, which means that these LEDPUFs are not only stable but also unique.We develop a new unified framework for evaluating the level of security of PUFs, based on password security, by using information theoretic tools of guesswork. The guesswork model allows to quantitatively compare, with a single unified metric, PUFs with varying levels of stability, bias and available side information. In addition, it generalizes other measures to evaluate the security level such as min-entropy and mutual information. We evaluate guesswork-based security of some measured SRAM and Ring Oscillator PUFs as an example and compare them with LEDPUF to show that stability has a more severe impact on the PUF security than biased responses. Furthermore, we find the guesswork of three new problems: Guesswork under probability of attack failure, the guesswork of idealized version of a message authentication code, and the guesswork of strong PUFs that are used for authentication.

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Section: B Techniques To Improve Parametric Puf Qualitymentioning

confidence: 99%

“…For unstable PUFs, re-sampling the PUF yields a noisy version of the original response as presented in equation (12). When the probability of transition is q, Theorem 1 shows us that it is sufficient to guess the original response x (1) up to Hamming distance m • q.…”

Section: Examples For Quantifying the Security Of Pufsmentioning

confidence: 99%

Design and Analysis of Stability-Guaranteed PUFs

Wang

Yona

Diggavi

et al. 2018

IEEE Trans.Inform.Forensic Secur.

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“…In [16], the systematic variation is modeled and subtracted from the PUF response to distill true randomness with the cost of model calculation. Similarly, in [19], the averaged RO frequency is subtracted from the original frequency, where the multiple measurements of each RO can lead to large latency overhead. In [20], a method is proposed to extract local random process variation from total variation, however, a second order difference calculation is needed, and hard-macro technique must be applied to construct symmetric delay paths.…”

Section: B Systematic Process Variationmentioning

confidence: 99%

UNBIAS PUF: A Physical Implementation Bias Agnostic Strong PUF

Wang,

Li,

Skudlarek

et al. 2017

Preprint

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The Physical Unclonable Function (PUF) is a promising hardware security primitive because of its inherent uniqueness and low cost. To extract the device-specific variation from delay-based strong PUFs, complex routing constraints are imposed to achieve symmetric path delays; and systematic variations can severely compromise the uniqueness of the PUF. In addition, the metastability of the arbiter circuit of an Arbiter PUF can also degrade the quality of the PUF due to the induced instability. In this paper we propose a novel strong UNBIAS PUF that can be implemented purely by Register Transfer Language (RTL), such as verilog, without imposing any physical design constraints or delay characterization effort to solve the aforementioned issues. Efficient inspection bit prediction models for unbiased response extraction are proposed and validated. Our experimental results of the strong UNBIAS PUF show 5.9% intra-Fractional Hamming Distance (FHD) and 45.1% inter-FHD on 7 Field Programmable Gate Array (FPGA) boards without applying any physical layout constraints or additional XOR gates. The UNBIAS PUF is also scalable because no characterization cost is required for each challenge to compensate the implementation bias. The averaged intra-FHD measured at worst temperature and voltage variation conditions is 12%, which is still below the margin of practical Error Correction Code (ECC) with error reduction techniques for PUFs.

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“…The authors of [13] and [14] analyze bias in RO PUFs on Altera FPGAs and show that bias is introduced based on the location of the RO on the die, as well as which LUT inputs are used and whether non-PUF-related (payload) activities are occurring. A chip-to-chip performance removal technique is proposed in which the mean frequency of each RO (computed from a sample population of devices) is used to offset the RO frequencies in each device, as a means of improving uniqueness.…”

Section: Introductionmentioning

confidence: 99%

An Analysis of FPGA LUT Bias and Entropy for Physical Unclonable Functions

Jao¹,

Wilcox

Thotakura³

et al. 2023

Preprint

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Process variations within Field Programmable Gate Arrays (FPGAs) provide a rich source of entropy and are therefore well-suited for the implementation of Physical Unclonable Funtions (PUFs). However, careful considerations must be given to the design of the PUF architecture as a means of avoiding undesirable localized bias effects that adversely impact randomness, an important statistical quality characteristic of a PUF. In this paper, we investigate a ring-oscillator (RO) PUF that leverages localized entropy from individual look-up table (LUT) primitives. A novel RO construction is presented that enables the individual paths through the LUT primitive to be measured and isolated at high precision and an analysis is presented that demonstrates significant levels of localized design bias. The analysis demonstrates that delay-based PUFs that utilize LUTs as a source of entropy should avoid using FPGA primitives that are localized to specific regions of the FPGA, and instead a more robust PUF architecture can be constructed by distributing path delay components over a wider region of the FPGA fabric. Compact RO PUF architectures that utilize multiple configurations within a small group of LUTs are particularly susceptible to these types of design-level bias effects. The analysis is carried out on data collected from a set of identically-designed, hard macro instantiations of the RO implemented on 30 copies of a Zynq 7010 SoC.

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Improving RO-PUF quality on FPGAs by incorporating design-dependent frequency biases

Cited by 7 publications

References 11 publications

Design and Analysis of Stability-Guaranteed PUFs

Design and Analysis of Stability-Guaranteed PUFs

UNBIAS PUF: A Physical Implementation Bias Agnostic Strong PUF

An Analysis of FPGA LUT Bias and Entropy for Physical Unclonable Functions

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