Improving the Electrical Properties of Lanthanum Silicate Films on Ge Metal Oxide Semiconductor Capacitors by Adopting Interfacial Barrier and Capping Layers

Abstract

The electrical properties of La-silicate films grown by atomic layer deposition (ALD) on Ge substrates with different film configurations, such as various Si concentrations, Al2O3 interfacial passivation layers, and SiO2 capping layers, were examined. La-silicate thin films were deposited using alternating injections of the La[N{Si(CH3)3}2]3 precursor with O3 as the La and O precursors, respectively, at a substrate temperature of 310 °C. The Si concentration in the La-silicate films was further controlled by adding ALD cycles of SiO2. For comparison, La2O3 films were also grown using [La((i)PrCp)3] and O3 as the La precursor and oxygen source, respectively, at the identical substrate temperature. The capacitance-voltage (C-V) hysteresis decreased with an increasing Si concentration in the La-silicate films, although the films showed a slight increase in the capacitance equivalent oxide thickness. The adoption of Al2O3 at the interface as a passivation layer resulted in lower C-V hysteresis and a low leakage current density. The C-V hysteresis voltages of the La-silicate films with Al2O3 passivation and SiO2 capping layers was significantly decreased to ∼0.1 V, whereas the single layer La-silicate film showed a hysteresis voltage as large as ∼1.0 V.

Improvement in electrical properties of high- κ film on Ge substrate by an improved stress relieved pre-oxide method

“…The desorption of GeO may occur in a uniform or nonuniform model for the high-k/Ge system, and 027702-2 finally results in the formation and growth of the voids. [11] As a result, the RMS value of sample A increases nearly 20 times after annealing. These results suggest that the HfO 2 /Ge gate stack treated with an improved SRPO method can efficiently avoid destructing the GeO volatilization after annealing, which is consistent with the XPS spectra.…”

“…[10] Thus annealing the high-κ/Ge gate stacks without GeO desorption is the key process to realize a high-quality interface and high-κ film. To cope with this challenge, various techniques have been proposed to passivate the high-κ/Ge interface such as ultrathin Si or SiO 2 capping layers, [11,12] GeO x N y passivation layer, [13] and highquality GeO 2 interfacial layers formed by plasma oxidation or ozone oxidation. [14][15][16] However, these techniques have not been developed perfectly yet to control the interface.…”

Comparison of high-k Y2O3/TiO2 bilayer and Y-doped TiO2 thin films on Ge substrate

“…The Ge/GeO 2−x interface has shown significantly high hysteresis, high interfacial trap density (D it ), and flat band voltage (V fb ) shift [4]. Therefore, various attempts have been made to passivate the Ge surface [5,6]. Among them, annealing the Ge/GI stack in an S-containing atmosphere (S passivation) or depositing a thin Si layer between the Ge and GI have shown stable interfacial properties [7,8].…”