2018 International Japan-Africa Conference on Electronics, Communications and Computations (JAC-ECC) 2018
DOI: 10.1109/jec-ecc.2018.8679560
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Improving the Performance of the Digital Predistorter Based on Sample Reuse- Rls Algorithm

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Cited by 2 publications
(9 citation statements)
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“…Should the value of the error at an instantaneous time sample be above the error threshold at an particular time sample, the algorithm re-computes the error for the following time sample, omitting the previous from the calculation of the DPD coefficients. The methodology proposed by [8] reports a 30dB improvement when compared to the un-modified RLS algorithm. The validation performed in [8], using a memory depth of 2, is simulated but the methodology would be robust against spurious noise.…”
Section: Related Workmentioning
confidence: 99%
See 4 more Smart Citations
“…Should the value of the error at an instantaneous time sample be above the error threshold at an particular time sample, the algorithm re-computes the error for the following time sample, omitting the previous from the calculation of the DPD coefficients. The methodology proposed by [8] reports a 30dB improvement when compared to the un-modified RLS algorithm. The validation performed in [8], using a memory depth of 2, is simulated but the methodology would be robust against spurious noise.…”
Section: Related Workmentioning
confidence: 99%
“…The methodology proposed by [8] reports a 30dB improvement when compared to the un-modified RLS algorithm. The validation performed in [8], using a memory depth of 2, is simulated but the methodology would be robust against spurious noise. Authors of [8] present results which indicate severe latency.…”
Section: Related Workmentioning
confidence: 99%
See 3 more Smart Citations