In‐Depth Analysis of One Selector–One Resistor Crossbar Array for Its Writing and Reading Operations for Hardware Neural Network with Finite Wire Resistance

Abstract

This work provides a comprehensive analytical analysis of one‐selector‐one‐resistor (1S1R) crossbar array (CBA) device for hardware neural network (HNN) applications. Simplified analytical device models are prepared from a particular 1S1R device to validate the analysis. The read margin (RM) analysis results show that the V/3 voltage scheme and reduced selector leakage are necessary to maximize the RM and maximum operable size N of the CBA, where N indicates the number of wires (word line or bit line). The write margin (WM) analysis results show that the unwanted switching of the unselected cell during the write operation is unlikely in the 1S1R CBA even with a large N value, despite a voltage drop along the interconnection wire. The analysis of simultaneous multiply‐and‐accumulate operations is conducted using the analytical method to examine the influence of voltage drop according to the wire and memory cells in HNN applications. Reducing the wire resistance and on‐state conductance increases the available N value when the selector operates near the threshold conditions. The proposed analytical model can estimate the maximum accuracy degradation of the HNN through the involvement of the unintentional voltage drop.

Training Method for Accurate Off‐Chip Training of One‐Selector‐One‐Resistor Crossbar Array with Nonlinearity and Wire Resistance

“…i(w i,j ,V j ) in Equation 1b, which represents the electrical current of 1S1R for the given V j and w i,j . The I-V relation of the 1S1R device model is depicted in Figure 2a (reproduced from [15] ) and 2b, along with the measurement results from the fabricated 1S1R device whose details are reported elsewhere. [15] Once the summed currents through the BLs are calculated, gradients for the w i,j should be calculated using the backpropagation method.…”

“…The I-V relation of the 1S1R device model is depicted in Figure 2a (reproduced from [15] ) and 2b, along with the measurement results from the fabricated 1S1R device whose details are reported elsewhere. [15] Once the summed currents through the BLs are calculated, gradients for the w i,j should be calculated using the backpropagation method. Two partial derivatives of i(w i,j ,V j ) regarding the w i,j and V j are calculated and used as gradients.…”

“…The I–V relation of the 1S1R device model is depicted in Figure a (reproduced from [ 15 ] ) and 2b, along with the measurement results from the fabricated 1S1R device whose details are reported elsewhere. [ 15 ]…”

“…Additionally, physical CBA must involve finite wire resistance, which means the device voltage deviates from the applied voltage in an extremely complicated manner. [15] Off-chip learning [7,16] corresponds to the case in which the specific software calculated the optimized weight values of the given HNN in a server during the training step, which then copied them into the HNN for the subsequent inferences. Therefore, similar off-chip learning can be introduced to facilitate the HNN to ensure a maximized accuracy even with nonideal devices, whose details are depicted in Figure 1a-d.…”

“…Additionally, physical CBA must involve finite wire resistance, which means the device voltage deviates from the applied voltage in an extremely complicated manner. [ 15 ]…”