In-Plane Gate Transistors With a 40-$\mu\hbox{m}$-Wide Channel Width

Chung, Tung-Hsun; Lin, Wei-Hsun; Chao, Yi-Kai; Chang, Shu‐Wei; Lin, Shih‐Yen

doi:10.1109/led.2012.2199735

Cited by 12 publications

(9 citation statements)

References 7 publications

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“…As shown in the figure, current modulations can be observed for both devices. The results have demonstrated that with or without the InAs QD absorption layer, the mechanism of channel depletion resulted from the mobile surface electron accumulation for wide-channel IPGTs can be applied to these two devices [7]. Also shown in the figure are the ∼2 times higher saturation drain currents of Device B compared with Device A.…”

Section: Resultsmentioning

confidence: 89%

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Long-Wavelength In-Plane Gate InAs Quantum-Dot Phototransistors

Chen

Shih

Lin

2015

IEEE Photon. Technol. Lett.

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In-plane gate transistors with and without an InAs quantum-dot (QD) absorption layer are investigated. The n-GaAs channel acts as both an absorption layer for incident light with energy higher than the GaAs bandgap and the transport path for the photocurrents. The insertion of InAs QD layer not only extends the absorption wavelength to 1.26 µm, but also enhances the optical response from GaAs.Index Terms-In-plane gate transistors, InAs quantum dots.

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Section: Resultsmentioning

confidence: 89%

“…In one previous publication, we have demonstrated that IPGTs with µm-size channels and gate/channel separations can be operated at V GS < ±10 V [7]. The mobile surface electrons are driven by negative in-plane gate voltages and accumulate on top of the 2DEG channel, which would deplete the normally on device channel.…”

Section: Introductionmentioning

confidence: 94%

Long-Wavelength In-Plane Gate InAs Quantum-Dot Phototransistors

Chen

Shih

Lin

2015

IEEE Photon. Technol. Lett.

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“…To further simplify the fabrication procedure, the architecture of in-plane gate transistors (IPGTs) with micrometer-sized channel widths is adopted in this work to demonstrate the memory effect of GaAsSb-capped InAs QDs. 19 The operation principle of wide-channel IPGTs is the density variation of 2DEG resulted from the electric fields built by different surface charge populations under different gate biases. This device architecture has also been utilized in the current modulation of a single n-type InGaAs sheet resistance which functions as a photodetector.…”

mentioning

confidence: 99%

“…The transistor behavior of wide-channel IPGTs originates from the mobile charge population induced by the gate bias. 19 In this case, the transport velocity of surface electrons would be the key factor determining whether (1) IPGTs alone introduce non-negligible dilations in timedependent measurements, and (2) this architecture is suitable for memory devices under fast modulations of the gate bias or not. The RT time-resolved drain currents of the reference device are shown in Fig.…”

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confidence: 99%

Memory device application of wide-channel in-plane gate transistors with type-II GaAsSb-capped InAs quantum dots

Liao

Chao

Chang

et al. 2013

Applied Physics Letters

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We demonstrate room-temperature electron charging/discharging phenomena of InAs quantum dots using wide-channel in-plane gate transistors. The device based on type-II GaAsSb-capped InAs quantum dots exhibits both the longer charging and discharging times than those of the type-I counterpart with GaAs capping layers. The slow charge relaxation of GaAsSb-capped InAs quantum dots and simple architecture of in-plane gate transistors reveal the potential of this device architecture for practical memory applications. V

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“…7 The enhancement of the on current and the reduction of the off-leakage current have been strongly required and simultaneously achieved by replacing poly-Si TFTs with a selfaligned ͑S/A͒ structure by those with a lightly doped drain ͑LDD͒ structure. 8 The mechanism of the off-leakage current in S/A TFTs has been frequently reported, [9][10][11][12][13][14][15][16] whereas that in LDD TFTs should be sufficiently discussed. 9 In this research, we have analyzed the mechanism of the offleakage current in LDD poly-Si TFTs using a two-dimensional ͑2D͒ device simulation and by evaluating the temperature dependence.…”

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confidence: 99%

Mechanism Analysis of Off-Leakage Current in Poly-Si TFTs with LDD Structure

Kimura

Nakashima²,

Sagawa

2010

Electrochem. Solid-State Lett.

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We have analyzed the mechanism of off-leakage current in a lightly doped drain ͑LDD͒ poly-Si thin film transistor ͑TFT͒ structure using a two-dimensional device simulation and by evaluating the temperature dependence. The off-leakage current in the selfaligned TFTs is mainly caused by band-to-band tunneling, and the off-leakage current in the LDD TFTs is mainly caused by phonon-assisted tunneling with the Poole-Frenkel effect. The carrier generation mostly occurs near the intersection of the frontinsulator interface and the interface between the LDD and drain regions because both the electron and hole densities are simultaneously low and the electric field is strong.Poly-Si thin film transistors ͑TFTs͒ 1 have been widely utilized for flat-panel displays, such as liquid-crystal displays, 2 organic light emitting diode displays, 3 and electronic papers, 4 as well as driver circuits and system-on-panel units, 5 and have been recently applied not only to sensors 1 but also to general electronics 6 such as information processors. 7 The enhancement of the on current and the reduction of the off-leakage current have been strongly required and simultaneously achieved by replacing poly-Si TFTs with a selfaligned ͑S/A͒ structure by those with a lightly doped drain ͑LDD͒ structure. 8 The mechanism of the off-leakage current in S/A TFTs has been frequently reported, [9][10][11][12][13][14][15][16] whereas that in LDD TFTs should be sufficiently discussed. 9 In this research, we have analyzed the mechanism of the offleakage current in LDD poly-Si TFTs using a two-dimensional ͑2D͒ device simulation and by evaluating the temperature dependence. The off-leakage current for high gate voltage ͑Vgs͒ and drain voltage ͑Vds͒ in S/A TFTs is mainly caused by band-to-band tunneling ͑BBT͒, 15 and it is newly found that the off-leakage current for any Vgs and Vds in LDD TFTs is mainly caused by phonon-assisted tunneling with the Poole-Frenkel effect ͑PAT͒. It is visualized that the carrier generation mostly occurs near the intersection of the front-insulator interface and the interface between the LDD and drain regions because both the electron and hole densities are simultaneously low and the electric field is strong in the LDD TFTs evaluated in this paper. LDD Poly-Si TFTThe LDD poly-Si TFT was fabricated as follows ͑Fig. 1͒. [17][18][19] First, an amorphous-Si film was deposited on a glass substrate using low pressure chemical vapor deposition of Si 2 H 6 , crystallized using a XeCl excimer laser, and then patterned to form a poly-Si film whose thickness ͑t Si ͒ was 50 nm. Next, a SiO 2 film was deposited using plasma-enhanced chemical vapor deposition of tetraethylorthosilicate to form a gate-insulator film whose thickness ͑t SiO2 ͒ was 75 nm. Afterward, a photoresist was patterned using photolithography as an implantation mask, and phosphorus ͑P͒ ions were implanted to form source and drain regions whose dose density was 2 ϫ 10 15 cm −2 , acceleration voltage was 55 keV, and carrier density ͑n+͒ was 2.3 ϫ 10 19 cm −3 , which were det...

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In-Plane Gate Transistors With a 40-$\mu\hbox{m}$-Wide Channel Width

Cited by 12 publications

References 7 publications

Long-Wavelength In-Plane Gate InAs Quantum-Dot Phototransistors

Long-Wavelength In-Plane Gate InAs Quantum-Dot Phototransistors

Memory device application of wide-channel in-plane gate transistors with type-II GaAsSb-capped InAs quantum dots

Mechanism Analysis of Off-Leakage Current in Poly-Si TFTs with LDD Structure

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