In-situ, In-Memory Stateful Vector Logic Operations based on Voltage Controlled Magnetic Anisotropy

Abstract

Recently, the exponential increase in compute requirements demanded by emerging applications like artificial intelligence, Internet of things, etc. have rendered the state-of-art von-Neumann machines inefficient in terms of energy and throughput owing to the well-known von-Neumann bottleneck. A promising approach to mitigate the bottleneck is to do computations as close to the memory units as possible. One extreme possibility is to do in-situ Boolean logic computations by using stateful devices. Stateful devices are those that can act both as a compute engine and storage device, simultaneously. We propose such stateful, vector, in-memory operations using voltage controlled magnetic anisotropy (VCMA) effect in magnetic tunnel junctions (MTJ). Our proposal is based on the well known manufacturable 1-transistor - 1-MTJ bit-cell and does not require any modifications in the bit-cell circuit or the magnetic device. Instead, we leverage the very physics of the VCMA effect to enable stateful computations. Specifically, we exploit the voltage asymmetry of the VCMA effect to construct stateful IMP (implication) gate and use the precessional switching dynamics of the VCMA devices to propose a massively parallel NOT operation. Further, we show that other gates like AND, OR, NAND, NOR, NIMP (complement of implication) can be implemented using multi-cycle operations.

Magnetoresistive Circuits and Systems: Embedded Non-Volatile Memory to Crossbar Arrays

“…However, three-terminal nature of this device leads to an extra access transistor, reducing the integration density of the array. Alternate device physics are extensively being explored such as domain walls [125]- [127], skyrmions [128], [129], magneto-electric devices [130], [131], voltage-controlled magnetic anisotropy [99], [132]- [134], etc., for new mechanisms of magnetization switching to mitigate the challenges in current MRAMs.…”

“…In particular, the non-volatile MRAM can potentially address the "memory wall" bottleneck caused by massive data transfer between processing and memory units encountered in today's dataintensive workloads, such as machine learning [13]. It has been proposed that Boolean arithmetic computations can be done near or in the memory by modifying the peripheral circuits and hence help in the reduction of data movements [97]- [99]. Moreover, crossbar arrays of MRAM devices can execute analog MVM operations, where both in-memory processing of data and intrinsic hardware parallelism can be exploited [100].…”

Eva-CiM: A System-Level Performance and Energy Evaluation Framework for Computing-in-Memory Architectures

“…Many design alternatives exist for CiM, which vary in circuit style, supported operations, device technologies, location in the memory hierarchy, application targets, etc. The most extreme design of CiM is to embed logic operations within each memory cell [31,32,33], which we refer to as fine-grained CiM. Another CiM design style is modifying the peripheral circuitry of the memory array (either SRAM or DRAM) to realize logic and arithmetic operations, which we refer to as coarsegrained CiM.…”

An Overview of In-memory Processing with Emerging Non-volatile Memory for Data-intensive Applications

“…Recent works [9][10][11]49] explore the use of STT-RAM in accomplishing bitwise logic operations. Based on the basic logic function realization by STT-RAM, advanced operations are implemented.…”