In-system constrained-random stimuli generation for post-silicon validation

On-Chip Cube-Based Constrained-Random Stimuli Generation for Post-Silicon Validation

“…2(d). These maskingbased methods eliminate the need for solving system equations and continuously reseeding LFSR with a set of seeds, as done in prior works [14], [15]. Also, as shown in this paper, they reduce the amount of data that is stored on-chip for programmable CRSG, because one cube can imply a large number of valid stimuli that satisfy the user-defined functional constraints without the need for a significant investment in onchip logic or memory resources.…”

“…4, it is not obvious how to port such features to hardware. Even if a mechanism is provided to alter the pseudorandom values produced by the LFSR in order to meet logic constraints, as it is the case for [14] [15] it is also necessary that the sequential constraints can be applied at a rate as fast as during pre-silicon verification. And when using sequential constraints is of key importance for post-silicon validation environments, it is critical that the hardware generator can handle constraint switching on a clock cycle basis.…”

“…The methods in [14], [15] tackled the challenge to generate functionally-compliant pseudo-random sequences by removing the non-compliant stimuli from the LFSR-generated sequence. Consider the case of generating stimuli containing two 4-bit signals a and b with the constraint a ≥ b.…”

“…The solvability and the frequency of reseeding depend on the LFSR configuration and constraints. Both the methods from [14], [15] and the preliminary versions of our method [28], [29], translate the user-defined constraints into an equivalent set of cubes as shown in Fig. 2(c).…”

On-chip stimuli generation for post-silicon validation

“…Recently [4] has shown how the concepts for pseudorandom sequence generation, ubiquitous in built-in self-test (BIST) for VLSI circuits, can be adapted to apply constrained-random patterns that are consistent with the constraints described in a pre-silicon environment. The basic idea is to translate the pre-silicon constraints into a representation where constrainedrandom sequences can be mapped onto the output space generated by compact finite state machines, such as linear-feedback shift registers (LFSRs).…”