Compared to orthogonal frequency division multiplexing (OFDM), spectrally efficient frequency division multiplexing (SEFDM) provides higher spectrum efficiency, which has been regarded as a promising waveform for future wireless communications. Against this background, the design of SEFDM receiver is investigated in this paper, considering its sampling frequency synchronization (SFS), timing synchronization, phase recovery, and detector design. Specifically, a two-step SFS module, which consists of a coarse sampling frequency offset (SFO) compensation and a frequency domain zero-forcing based fine estimation, is proposed first. Next, a low-complexity timing synchronization scheme is designed to avoid excessive multipliers and look-up-tables. Furthermore, an SFO-based phase recovery is proposed, which shares the compensation and SFO estimation with SFS module, thus further reducing the complexity of SEFDM receiver. Finally, TSVD-FSD based detector has been studied to efficiently eliminate intercarrier interference. Simulation results demonstrate the superiority of our proposed SEFDM receiver, where the transmission rate can be improved by 25% at a loss of only 0.7dB bit error ratio compared to OFDM. Finally, field programmable gate array (FPGA) based implementation is carried out to verify the effectiveness of our proposed SEFDM receiver in practice.INDEX TERMS Spectrally efficient frequency division multiplexing (SEFDM), sampling frequency synchronization (SFS), low-complexity implementation structure, field programmable gate array (FPGA)