Indirect Matrix Converter Hardware-in-the-Loop Semi-Physical Simulation Based on Latency-Free Decoupling

Abstract

In the process of hardware-in-the-loop simulations (HILs) of indirect matrix converters (IMCs), solving the mathematical models of complex multiswitching converter topologies has become a major problem. The conventional approach is to split the complex mathematical model into multiple serial subsystems; however, this inevitably produces delays in the simulation steps between different subsystems, leading to numerical oscillations. In this paper, the method of latency-free decoupling is adopted, which has no time-step delay between different subsystems, making each subsystem a parallel operation. This can improve the numerical stability of the simulations and can effectively reduce the step size of the real-time simulation and alleviate the problem of real-time simulation resource consumption. In this paper, we discuss in detail the modeling process of IMC hardware-in-the-loop simulations with Finite Control Set Model Predictive Control (FCS-MPC), and experimentally validate our method using the Speedgoat test platform, resulting in a simulation step size of less than 200 ns. The simulation results are compared with the results of Matlab’s Simpower power system, which allows us to evaluate the accuracy of our model.

Efficient Prototyping of a Field-Programmable Gate Array-Based Real-Time Model of a Modular Multilevel Converter

“…The other key factor that affects the calculation speed is the judgment of the switches. In general, the ideal switch function model [15], the R on /R off model [16], and the associated discrete circuit model [17] are three commonly used models for system-level simulations with a detailed representation of the switch steady-state effect. Although the transient state of the switch can further improve the system accuracy, the model size is largely limited due to the hardware resource of FPGAs [18].…”