Indium arsenide: a semiconductor for high speed and electro-optical devices

Milnes, A. G.; Polyakov, A. Y.

doi:10.1016/0921-5107(93)90140-i

Cited by 96 publications

(58 citation statements)

References 111 publications

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“…We have previously demonstrated controlled growth of one-dimensional nanowires by MOVPE, using a variety of III-V materials [3,4]. Of these materials, InAs is one of the most interesting for electronics applications, due to its high electron mobility and narrow bandgap [5]. The formation of axial heterostructures in InAs nanowires allows for a new method of fabricating devices such as resonant tunnelling diodes [6] and few electron memories [7].…”

Section: Introductionmentioning

confidence: 99%

InAs nanowires grown by MOVPE

Dick

Deppert

Samuelson

et al. 2007

Journal of Crystal Growth

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Section: Introductionmentioning

confidence: 99%

InAs nanowires grown by MOVPE

Dick

Deppert

Samuelson

et al. 2007

Journal of Crystal Growth

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“…InAs is one of the most promising materials for nanowire applications, exhibiting a narrow band gap (0.36 eV) and very high electron mobility (20000 cm 2 V À1 s À1 ), properties that are attractive for high-frequency electronic applications [1]. The narrow diameters of nanowires make them an ideal system for the formation of high-mismatch heterostructures [2].…”

Section: Introductionmentioning

confidence: 99%

“…However, InAs is among the softest of III-V materials (3300 N mm À2 ) [8], and its low melting point (942 1C) [1] and heat of formation (À14.0 kcal mol À1 at 298 K) [9] make it very temperature-sensitive and reactive. Additionally, InAs is highly reactive with Au [10], which is normally used as the seed particle for epitaxial nanowire growth.…”

Section: Introductionmentioning

confidence: 99%

Optimization of Au-assisted InAs nanowires grown by MOVPE

Dick

Deppert

Samuelson

et al. 2006

Journal of Crystal Growth

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“…12 % for InAs on Si) and thermal expansion coefficients. [10][11][12] InAs has been used in a number of NW devices (see the literature for examples [13][14][15][16] ), and is one of the most promising materials for high-speed electronics [17] due to its high electron mobility, high electron saturation velocity, and low resistance contacts; still, it has proven difficult to combine InAs directly with Si. At the same time there is a strong drive from the electronics industry to integrate high-performance nanomaterials with Si [1] using methods compatible with existing Si processing.…”

mentioning

confidence: 99%

Epitaxial Growth of Indium Arsenide Nanowires on Silicon Using Nucleation Templates Formed by Self‐Assembled Organic Coatings

et al. 2007

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The material properties of III-V semiconductors are in many ways superior to those of Si. Examples of these properties are the possibilities for high electron mobilities and the direct bandgap in most III-V semiconductors. Even so, Si remains the standard material in the electronics industry. A successful combination of these two material systems would add new functionality and increased performance compared to standard Si technology.[1] Although these advantages have long been recognized, the monolithic integration of devicequality III-V materials on Si remains a major challenge. In this work, we report on heteroepitaxial growth of InAs nanowires (NWs) directly on Si substrates by employing self-assembled organic coatings to create an oxide template that guides NW nucleation. Such a template resembles the growth masks used in selective-area epitaxy of nanostructures on III-V substrates. [2][3][4] Importantly, Au, which is commonly used for NW synthesis but not compatible with modern complementary metal oxide semiconductor (CMOS) processing, is avoided. The described nucleation method presents clear advantages in terms of epitaxial quality and control of NW size and density distributions compared to previous results achieved on Si using catalyst-free NW growth. The control demonstrated in the fields of self-assembled [5] and printed organic nanostructures [6,7] illustrates how the method may be extended to more complex patterning in future work. NWs have been the subject of much study and have great potential as a future technology platform. [8,9] One unique feature of the NW geometry is the small NW/substrate interface, which could provide a path to monolithic integration of highperformance materials, such as heterostructure III-V device structures, onto the mainstream Si platform. The small interface helps to mitigate antiphase domain formation, and accommodates a considerable mismatch in lattice constants (ca. 12 % for InAs on Si) and thermal expansion coefficients. [10][11][12] InAs has been used in a number of NW devices (see the literature for examples [13][14][15][16] ), and is one of the most promising materials for high-speed electronics [17] due to its high electron mobility, high electron saturation velocity, and low resistance contacts; still, it has proven difficult to combine InAs directly with Si. At the same time there is a strong drive from the electronics industry to integrate high-performance nanomaterials with Si [1] using methods compatible with existing Si processing. Contamination from the commonly used Au particles in the vapor-liquid-solid (VLS) mechanism [18] for NW growth is a concern because Au is an impurity in Si, which traps electrons and holes by deep-level recombination centers. [19] Inevitably, some traces of Au will contaminate process equipment or end up in the nanostructures grown. [20,21] For this reason, Au is not compatible with modern CMOS processing. NW growth without foreign metal catalyst particles thus offers an attractive alternative to the VLS method. Approaches such...

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Indium arsenide: a semiconductor for high speed and electro-optical devices

Cited by 96 publications

References 111 publications

InAs nanowires grown by MOVPE

InAs nanowires grown by MOVPE

Optimization of Au-assisted InAs nanowires grown by MOVPE

Epitaxial Growth of Indium Arsenide Nanowires on Silicon Using Nucleation Templates Formed by Self‐Assembled Organic Coatings

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