Inferring assertion for complementary synthesis

Code Generation From MATLAB – Simulink Models

“…The connections between the blocks are made through the tags <Link> and </Link> (Listing 8, lines [15][16][17][18][19][20]. Inside these tags are two tags named <OutputPort> and </OutputPort>, that specify the output ports of the block owned by as="source" and indicating which is the block output id="...".…”

“…In [20] was proposed an approach to automatic synthesis of additional decoders. The method attempts to find and remove cases where there are no equivalent decoders.…”