We show how logic programs with "delays" can be transformed to programs
without delays in a way which preserves information concerning floundering
(also known as deadlock). This allows a declarative (model-theoretic),
bottom-up or goal independent approach to be used for analysis and debugging of
properties related to floundering. We rely on some previously introduced
restrictions on delay primitives and a key observation which allows properties
such as groundness to be analysed by approximating the (ground) success set.
This paper is to appear in Theory and Practice of Logic Programming (TPLP).
Keywords: Floundering, delays, coroutining, program analysis, abstract
interpretation, program transformation, declarative debuggingComment: Number of pages: 24 Number of figures: 9 Number of tables: non