Influence of a thin oxide layer between metal and semiconductor on Schottky diode behavior

Abstract

Two frequently observed problems with Schottky diodes are soft current–voltage characteristics and low avalanche breakdown voltages. These problems are sometimes found immediately upon fabrication, or they may develop during use. It is proposed that these phenomena can be explained by the existence of a thin layer (25–250 Å thick) between the metal and semiconductor which (i) has a high charge density, (ii) has a high trap density, and (iii) is conducting. Observed barrier height changes are explained by the trapping of charge carriers flowing through the layer and the lowered avalanche breakdown voltage by heating of carriers in the high field in the intervening layer. These explanations have been confirmed by measurements on GaP and GaAs diodes having a deliberately grown thin interfacial oxide ∠100 Å thick. Such an interfacial layer can be detected using a pulsed current–voltage technique described in the paper.

Negative Capacitance Behavior at Low Frequencies of Nitrogen-Doped Polyethylenimine-Functionalized Graphene Quantum Dots-Based Structure

“…The value of R i becomes almost constant at a strong accumulation region, which corresponds to the real value of R s at high frequency. There are several methods to calculate the voltage- or energy-dependent profile of N ss such as Hill-Coleman, low-high frequency capacitance, admittance, or parallel conductance. − However, the admittance method is the most reliable and sensitive one among them so the following relation (eq ) is used G p ω = ω G m C i G normalm 2 + ω 2 false( C normali − C normalm false) 2 = q A N s s 2 ω τ ln false( 1 + false( ω τ false) 2 false) where C i is the interfacial layer capacitance, C m and G m are the measurement capacitance and conductance values, A is the rectifier-contact area, and τ is the relaxation time. To determine both the value of N ss and their lifetimes, first, both the C –ln f and G /ω–ln f curves of the structure were drawn between 1.0 and 4.9 V by 0.1 V steps and presented in Figure .…”

“…Thus, the values of N ss and τ were determined from the peak value of the G p /ω versus f plot by using the following relations. − N s s = false( G normalp / ω false) max 0.402 q A ωτ = 1.98 …”

Differential capacitance-voltage profiling of Schottky barrier diodes for measuring implanted depth distributions in silicon

“…This is the probable mechanism for aging of Schottky barriers that is discussed in the literature. Aging of Schottky barriers is discussed for silicon by Turner and Rhoderick [45] and Muret and Deneuville [55], and by Nicollian et al [51] for gallium arsenide The I-V characteristics of the 0.13-mm dots were consistently good. Acceptable I-V characteristics and C-V profiles were obtained for some of the 0.25-mm dots.…”

Formation et propriétés de l'interface métal-semiconducteur et de la barrière de Schottky

“…Il n'en est pas ainsi lorsque la surface du semiconducteur est recouverte de sa couche d'oxyde natif, par exemple, ou d'une couche isolante mince d'une autre origine. Ce cas très important du point de vue expérimental a été traité par Cowley et Sze [14] qui ont proposé un modèle bien adapté [15] qui, aux limites, rend compte aussi des interactions correspondant aux modèles de Schottky et de Bar-deen. 3.…”