Influence of the underlap length on the RF noise performance of a Schottky Barrier MOSFET

Abstract

This paper is focused on the analysis of the highfrequency dynamic and noise performance and the static characteristics of n-type Schottky barrier (SB) MOSFETs on SOI substrate. A 2D Ensemble Monte Carlo (EMC) simulator including tunnelling transport at the Schottky interfaces has been used. Quantum transmission coefficients and treatment of image charge effects on the Schottky barrier have been carefully considered. The influence of the underlap length on the main figures of merit is described, thus showing the importance of this architecture parameter for the optimization of these devices.

Ambipolarity reduction in DMG asymmetric vacuum dielectric Schottky Barrier GAA MOSFET to improve hot carrier reliability

“…Using the boundary conditions (9a-9c) form reference [11] and (8a-8b) the solution of 1D Poisson's equation (6) in three different regions is obtained as:…”

“…At nanoscale the junction depletion width (p-n) at SourceChannel (S-C) and Channel-Drain (C-D) junctions can not be neglected as it degrades the ON current due to increased S-C and C-D resistance [5][6][7][8] and is actively involved in MOSFET device performance. The Schottky Barrier (SB) Cylindrical Gate All Around (CGAA) MOSFET with lightly doped channel have attracted attention [9][10][11][12] to overcome the device fabrication challenges like abrupt source/drain formation as it offers low resistivity (ρ c ~10 -9 Ω.cm) of metallic source drain and no depletion in S/D regions [13].…”