Optical Fiber Communication Conference. Technical Digest Postconference Edition. Trends in Optics and Photonics Vol.37 (IEEE Ca
DOI: 10.1109/ofc.2000.869435
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InP-based pin TWA photoreceivers with low group delay scatter over 40 GHz bandwidth

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“…The integration of compound semiconductor devices on silicon substrates has been examined for many years. Successful integration of III−V devices onto silicon-integrated circuits would allow for new architectures with much greater functionality. Of particular interest to us is the integration of indium phosphide on silicon, since indium phosphide is a technologically important material and widely used in high-speed electronics. In addition, indium phosphide is an interesting photoelectrode material because of the high reported photovoltage of liquid junction cells fabricated with p-type InP. , However, the principal difficulties with the integration of InP on Si are the presence of a polar/nonpolar interface and the large lattice mismatch between the two semiconductors. These properties result in high defect densities in the III−V materials that degrade device performance. ,, One way to tackle this problem is to fabricate InP devices out of one-dimensional, free-standing nanowires, which are very good at accommodating lattice strain and thermal mismatch. , …”
Section: Introductionmentioning
confidence: 99%
“…The integration of compound semiconductor devices on silicon substrates has been examined for many years. Successful integration of III−V devices onto silicon-integrated circuits would allow for new architectures with much greater functionality. Of particular interest to us is the integration of indium phosphide on silicon, since indium phosphide is a technologically important material and widely used in high-speed electronics. In addition, indium phosphide is an interesting photoelectrode material because of the high reported photovoltage of liquid junction cells fabricated with p-type InP. , However, the principal difficulties with the integration of InP on Si are the presence of a polar/nonpolar interface and the large lattice mismatch between the two semiconductors. These properties result in high defect densities in the III−V materials that degrade device performance. ,, One way to tackle this problem is to fabricate InP devices out of one-dimensional, free-standing nanowires, which are very good at accommodating lattice strain and thermal mismatch. , …”
Section: Introductionmentioning
confidence: 99%