Input current ripple cancellation in synchronized, parallel connected critically continuous boost converters

Elmore, Michael

doi:10.1109/apec.1996.500436

Cited by 95 publications

(19 citation statements)

References 5 publications

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“…Fig. 10 plots the average freewheeling diode current variation for different output and line voltages using (14). It can be observed that the average freewheeling diode current is larger than that of the boost counterpart and decreases as the output voltage increases.…”

Section: Power Stage Design Considerationsmentioning

confidence: 97%

Design and Analysis of an Interleaved Boundary Conduction Mode (BCM) Buck PFC Converter

Choi¹

2014

Journal of Power Electronics

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This paper presents the design considerations and analysis for an interleaved boundary conduction mode power factor correction buck converter. A thorough analysis of the harmonic content of the AC line current is presented to examine the allowable voltage gain (K value) for meeting the EN61000-3-2, Class D standard while maximizing efficiency. The results of the harmonic analysis are used to derive the required value of K and therefore the output voltage necessary to meet the class D requirements for a given AC line voltage. The discussed design consideration and harmonic current analysis are verified on a 300W universal line experimental prototype converter with an 80V output. The measured efficiencies remain above 96% down to 20% of the full load. The input current harmonics also meet the IEC61000-3-2 (class D) standard.

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Section: Power Stage Design Considerationsmentioning

confidence: 97%

Design and Analysis of an Interleaved Boundary Conduction Mode (BCM) Buck PFC Converter

Choi¹

2014

Journal of Power Electronics

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“…However, interleaving CRM boost rectifiers is challenging because the rectifier switching frequency must adjust over a wide range according to the line voltage and load. Previous research on interleaved modules classifies in two control categories: open-loop control [3]- [6] and phase-locked-loop (PLL) based closed-loop control [7]- [8]. Work done in [2] (a) (b) Figure 1.…”

Section: Introductionmentioning

confidence: 97%

Digitally controlled open-loop master-slave interleaved boost PFC rectifier

Shin

Seo

Cho

et al. 2012

2012 Twenty-Seventh Annual IEEE Applied Power Electronics Conference and Exposition (APEC)

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In this paper, a digital control method for open-loop interleaving technique for two-phase critical conduction mode (CRM) boost power factor correction (PFC) rectifier is proposed. The proposed control method guarantees the exact phase shift between master and slave module, as well as proper soft switching of slave MOSFET. The phase shift between the modules is maintained in any time including the transient operation, but slight time deviation of turn-on instant of slave MOSFET may occur as a trade-off. The control circuit requires simple logic elements and digital control ICs, and does not require any two-loop control calculation and phase-lockedloop. The performance of the proposed control method is verified by 500 -W laboratory prototype hardware.

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“…Recently, there have been papers published on this general topic [1]- [14]. The CCM/DCM boundary mode boost converter has no reverse recovery problem with power diode while maintaining moderate power transistor losses.…”

Section: Introductionmentioning

confidence: 99%

A novel SFVM control scheme for two-phase interleaved CCM/DCM boundary mode boost converter in power factor correction applications

Cogălniceanu

Liu

2010

2010 IEEE Energy Conversion Congress and Exposition

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This paper presents an open-loop synchronized-off voltage mode (SFVM) control scheme for a two-phase interleaved boost converter with master-slave strategy for PFC applications. Interleaving CCM/DCM boundary mode boost converters, however, is complicated because of the variablefrequencies nature of the operation. The problem of current divergence is often encountered in the Slave converter. In this paper, a novel on-time adjustment scheme of Slave converter is presented to stabilize the interleaved converter without using any phase-lock loop, multiplier or inductor current sensing. A circuit was proposed to verify the strategy by simulations.

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Input current ripple cancellation in synchronized, parallel connected critically continuous boost converters

Cited by 95 publications

References 5 publications

Design and Analysis of an Interleaved Boundary Conduction Mode (BCM) Buck PFC Converter

Design and Analysis of an Interleaved Boundary Conduction Mode (BCM) Buck PFC Converter

Digitally controlled open-loop master-slave interleaved boost PFC rectifier

A novel SFVM control scheme for two-phase interleaved CCM/DCM boundary mode boost converter in power factor correction applications

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