Inserting Data Encoding Techniques into NoC-Based Systems

Palma, J.C.S.; Indrusiak, Leandro Soares; Moraes, Fernando; Ortiz, Alberto García; Glesner, Manfred; Reis, Ricardo

doi:10.1109/isvlsi.2007.58

Cited by 15 publications

(5 citation statements)

References 9 publications

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“…CAFES models the dynamic energy consumption, using the concept of bit energy (EBit), similarly to models described elsewhere, like in [35,8]. Nevertheless, some of the models specified here consider also the effect of the number of bits transmitted and the number of bit transitions during message transfer [30]. For several communication architectures, EBit can be expressed as a function of four variable quantities, as depicted by Eq.…”

Section: Energy Modelmentioning

confidence: 99%

“…Thus, the availability of procedures to generate synthetic applications is useful, if not mandatory. Several works like [19][20][21]15,18,30,22] have benefited from the use of tools for automatic application graph generation. Accordingly, the CAFES framework has available a set of graph generation tools to automate the process of building synthetic applications.…”

Section: Graph Generation Tools To Automate Synthetic Application Bui...mentioning

confidence: 99%

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CAFES: A framework for intrachip application modeling and communication architecture design

Marcon

Calazans

Moreno

et al. 2011

Journal of Parallel and Distributed Computing

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Section: Energy Modelmentioning

confidence: 99%

Section: Graph Generation Tools To Automate Synthetic Application Bui...mentioning

confidence: 99%

CAFES: A framework for intrachip application modeling and communication architecture design

Marcon

Calazans

Moreno

et al. 2011

Journal of Parallel and Distributed Computing

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“…Power dissipation is introduced as an important issue in NoCs because of advanced VLSI technology [4]. Researchers proposed many different approaches to decline energy consumption in NoCs [5]- [19].…”

Section: Introductionmentioning

confidence: 99%

Effective Routing Algorithm and Topology on Power Consumption in Networks on Chip

Taassori¹,

Uysal²

2018

JCP

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Network on Chip (NoC) is used as an appropriate solution to solve the communication problems in System on Chip (SoC). Due to the advanced VLSI technology the power consumption has become a major part in NoCs. In this article we compare the effect of different routing algorithms and topologies on power dissipation in NoCs. This paper illustrates the efficacy of low power encoding approach on power consumption in on chip networks. We assess the impact of deterministic, partially adaptive and fully adaptive routing algorithms and also mesh and torus topologies with and without using low power encoding algorithm on link and total power consumption in NoC.

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“…Differently from the previous works in which the selection function is designed with the aim of optimizing performance metrics (Hu and Marculescu, 2004;Ascia et al, 2008), our proposal is mainly oriented to reducing the power dissipated by the network links. In fact, as technology shrinks, the power dissipated by the links is as significant as (or more significant than) that dissipated by routers and network interfaces (Srinivasan and Chatha, 2006;Palma et al, 2007;Hoskote et al, 2007;Carloni et al, 2008). Links dissipate power due to the switching activity (both self and coupling) induced by subsequent data patterns traversing the link (Jantsch et al, 2005).…”

Section: Introductionmentioning

confidence: 99%

Coupling Routing Algorithm and Data Encoding for Low Power Networks on Chip

Palesi

Patti²,

Ascia³

et al. 2015

Journal of Computer Science

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Abstract:The routing algorithm used in a Network-on-Chip (NoC) has a strong impact on both the functional and non functional indices of the overall system. Traditionally, routing algorithms have been designed considering performance and cost as the main objectives. In this study we focus on two important non functional metrics, namely, power dissipation and energy consumption. We propose a selection policy that can be coupled with any multi-path routing function and whose primary goal is reducing power dissipation. As technology shrinks, the power dissipated by the network links represents an ever more significant fraction of the total power budget. Based on this, the proposed selection policy tries to reduce link power dissipation by selecting the output port of the router which minimises the switching activity of the output link. A set of experiments carried out on both synthetic and real traffic scenarios is presented. When the proposed selection policy is used in conjunction with a data encoding technique, on average, 31% of energy reduction and 37% of power saving is observed. An architectural implementation of the selection policy is also presented and its impact on cost (silicon area) and power dissipation of the baseline router is discussed.

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Inserting Data Encoding Techniques into NoC-Based Systems

Cited by 15 publications

References 9 publications

CAFES: A framework for intrachip application modeling and communication architecture design

CAFES: A framework for intrachip application modeling and communication architecture design

Effective Routing Algorithm and Topology on Power Consumption in Networks on Chip

Coupling Routing Algorithm and Data Encoding for Low Power Networks on Chip

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