Instance-Specific Solutions for Accelerating the Cky Parsing of Large Context-Free Grammars

Abstract

The main contribution of this paper is an FPGA-based implementation of an instance-specific hardware which accelerates the CKY (Cocke-Kasami- Younger) parsing of context-free grammars. Given a context-free grammar G and a string x, the CKY parsing determines whether G derives x. We developed a hardware generator that creates a Verilog HDL source to perform the CKY parsing for any fixed context-free grammar G. The generated source is embedded in an FPGA using the design software provided by the FPGA vendor. The results show that our instance-specific hardware solution attains an astonishing speed-up factor of up to 3,700 over traditional software solutions.

An Efficient GPU Implementation of CKY Parsing Using the Bitwise Parallel Bulk Computation Technique

“…in a 32-bit integer for each i, j, and k. The CKY parsing can be done by iterative simulation of a combinational logic circuit [8], [9], the BPBC technique can be applied to it.…”

“…In [16], it was shown that parsing can be accomplished on a one-way linear array of n 2 finite-state processors in linear time. Since these parallel algorithms need at least n processors, they are unrealistic for large n. Ciressan et al [17], [18] and Bordim et al [8], [9] have presented hardwares for the CKY parsing for context-free grammars and have tested them using FPGAs. In [8], it has been shown that the CKY parsing with 64 non-terminal symbols and 8192 production rules can be done in 162µs for an input string of length 32 using an APEX20K family FPGA.…”

Cluster-dot Screening by Local Exhaustive Search with Hardware Accelaration

“…We have used Nallatech Xtreme DSP kit [13], which is a PCI board with Xilinx VirtexII family FPGA XC2V3000-4 [6], and embedded a circuit to perform the local exhaustive search for a window of size . To reduce the amount of used FPGA resource and the delay, we use the instance-specific approach [3,4,11], which embeds a hardware depending on a part of the input instance. The instance-specific approach is applied as follows.…”

“…Hence, we are going to define the Gaussian error of as follows. Gaussian error at each pixel location is defined by (3) and the total Gaussian error is defined by (4) Since the Gaussian filter approximates the characteristics of the human visual system, we can think that image reproduces original gray-scale image if is small non-cluster-dot screening 2-cluster-dot screening 3-cluster-dot screening 4-cluster-dot screening The best binary image may have dots with isolated pixels. For example, let be a binary image of size with every pixel having intensity .…”

Efficient Exhaustive Verification of the Collatz Conjecture using DSP blocks of Xilinx FPGAs

“…Recent FPGAs except some low-end FPGAs have a DSP block with a multiplier and an adder, which can perform multiply-accumulate operation in high clock frequency [13]. It has been shown that a lot of computation can be accelerated using a circuit implemented in FPGAs [2,3,10,11,12].…”