Instruction encoding synthesis for architecture exploration using hierarchical processor models

Nohl, Achim; Greive, Volker; Braun, Gunnar; Andreas, Andreas; Leupers, Rainer; Schliebusch, Oliver; Meyr, H.

doi:10.1145/775832.775898

Cited by 11 publications

(2 citation statements)

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“…Together with our previous work on automatic synthesis of instruction encoding [13] and generation of RTL descriptions [16], the proposed semantic extension of the LISA ADL allows for a very high design efficiency on abstract level, while maintaining consistency by means of a single model throughout the entire design process.…”

Section: Resultsmentioning

confidence: 99%

A novel approach for flexible and consistent ADL-driven ASIP design

Braun¹,

Nohl²,

Sheng³

et al. 2004

Proceedings of the 41st Annual Design Automation Conference

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Architecture description languages (ADL) have been established to aid the design of application-specific instruction-set processors (ASIP). Their main contribution is the automatic generation of a software toolkit, including C compiler, assembler, linker, and instruction-set simulator. Hence, the challenge in the design of such ADLs is to unambiguously capture the architectural information required for the toolkit generation in a single model. This is particularly difficult for C compiler and simulator, as both require information about the instructions' semantics, however, while the C compiler needs to know what an instructions does, the simulator needs to know how. Existing ADLs solve this problem by either introducing redundancy or by limiting the language's flexibility. This paper presents a novel, mixed-level approach for ADLbased instruction-set description, which offers maximum flexibility while preventing from inconsistencies. Moreover, it enables capturing instruction-and cycle-accurate descriptions in a single model. The feasibility and design efficiency of our approach is demonstrated with a number of contemporary, real-world processor architectures.

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Section: Resultsmentioning

confidence: 99%

A novel approach for flexible and consistent ADL-driven ASIP design

Braun¹,

Nohl²,

Sheng³

et al. 2004

Proceedings of the 41st Annual Design Automation Conference

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“…For example, nML is extended by Target Compiler Technologies [16] to perform synthesis and test generation. Similarly, the LISA language has been used for hardware generation [54,67], instruction encoding synthesis [68] and JTAG interface generation [69]. Likewise, EXPRESSION has been used for hardware generation [56], instruction set synthesis [70], test generation [64,71], and specification validation [58,62].…”

Section: Discussionmentioning

confidence: 99%

Processor Description Languages

Mishra¹,

Dutt²

2008

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Embedded systems present a tremendous opportunity to customise designs by exploiting the application behaviour. Shrinking time-to-market, coupled with short product lifetimes, create a critical need for rapid exploration and evaluation of candidate architectures. Architecture description languages (ADL) enable exploration of programmable architectures for a given set of application programs under various design constraints such as area, power and performance. The ADL is used to specify programmable embedded systems, including processor, coprocessor and memory architectures. The ADL specification is used to generate a variety of software tools and models facilitating exploration and validation of candidate architectures. The paper surveys the existing ADLs in terms of (a) the inherent features of the languages and (b) the methodologies they support to enable simulation, compilation, synthesis, test generation and validation of programmable embedded systems. It concludes with a discussion of the relative merits and demerits of the existing ADLs and expected features of future ADLs.

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