Integrated circuit teaching through top-down design

Franca, J.E.

doi:10.1109/13.330102

Cited by 6 publications

(2 citation statements)

References 2 publications

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“…Using the "top-down" and "bottom-up" terms [32,33,34,35], we describe this methodology as architecturally and functionally top-down with performance designed in a bottom-up style. In general, design teams already follow this approach.…”

Section: Incomplete Implementation Of the Methodologymentioning

confidence: 99%

Verification of Complex Analog and RF IC Designs

Chang¹,

Kundert²

2007

Proc. IEEE

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Meeting performance specifications in the design of Analog and RF (A/RF) blocks and integrated circuits (IC) continues to require a high degree of skill, creativity, and expertise. However, today's A/RF designers are increasingly faced with a new challenge. Functional complexity in terms modes of operation, extensive digital calibration, and architectural algorithms is now overwhelming traditional A/RF design methodologies. Functionally verifying A/RF designs is a daunting task requiring a rigorous methodology. As occurred in digital design, analog verification is becoming a separate and critical task. This paper describes the verification issues faced by the A/RF designer and presents a verification methodology to address these challenges. It presents a systematic approach to A/RF verification, the concept of an analog verification engineer, how to establish the methodology, and concludes with an example.

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Section: Incomplete Implementation Of the Methodologymentioning

confidence: 99%

Verification of Complex Analog and RF IC Designs

Chang¹,

Kundert²

2007

Proc. IEEE

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“…Over the years, the curriculum for teaching of micro/nanoelectronics and very large-scale integrated (VLSI) circuit design has been addressed by many researchers [8][9][10][11][12]. In order to bridge the gap between the theory and the practical applications of the subject, a range of EDA software/tools have been available [13].…”

Section: Related Workmentioning

confidence: 99%

A web‐based method for building and simulating standard cell circuits—A classroom application

Beg

2014

Comp Applic In Engineering

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ABSTRACT:The characterization of standard cells (basic digital blocks) is an iterative and arduous process. Our web-based tool enables the students/users to quickly perform a large number of characterization experiments. The tool is useful for various courses on micro/nano-electronics and circuit design, and eliminates the need for costly CAD-software/hardware. ß 2014 Wiley Periodicals, Inc. Comput Appl Eng Educ 23:304-313, 2015; View this article online at wileyonlinelibrary.com/journal/cae;

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Synthetic biology methodology and model refinement based on microelectronic modeling tools and languages

Gendrault

Madec

Lallement

et al. 2011

Biotechnology Journal

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In microelectronics, the design of new systems is based on a proven time-tested design flow. The goal of this paper is to determine to what extend this design flow can be adapted to biosystem design. The presented methodology is based on a top-down approach and consists of starting with a behavioral description of the system to progressively refine it to its final low-level system representation, composed of DNA parts. To preserve accuracy and simplicity, the design flow relies on refined models of biological mechanisms, which can be expressed by the hardware description languages and simulation tools traditionally used in microelectronics. A case study, the complete modeling of a priority encoder, is presented to demonstrate the effectiveness of the method.

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Integrated circuit teaching through top-down design

Cited by 6 publications

References 2 publications

Verification of Complex Analog and RF IC Designs

Verification of Complex Analog and RF IC Designs

A web‐based method for building and simulating standard cell circuits—A classroom application

Synthetic biology methodology and model refinement based on microelectronic modeling tools and languages

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