Integrating independently developed real-time applications on a shared multi-core architecture

Abstract

The shift towards multi-core platforms has become inevitable from an industry perspective, therefore proper techniques are needed to deal with challenges related to this migration from single core architectures to a multi-core architecture. One of the main concerns for system developers in this context is the migration of legacy realtime systems to multi-core architectures. To address this concern and to simplify the migration, independently-developed subsystems are abstracted with an interface, such that when working with multiple independently-developed subsystems to be integrated on a shared platform, one does not need to be aware of information or policies used in other subsystems in order to determine subsystemlevel schedulability. Instead schedulability can be checked through their interfaces at the time of integration on a shared multi-core architecture. In this paper we propose a solution for investigating the system schedulability via providing interfaces for independentlydeveloped subsystems where some of them are distributed over more than one processor and may share resources.

Multiprocessor Real-Time Locking Protocols: A Systematic Review

“…with the priority inheritance rule in place, τ 4 remains scheduled at time 4 when the higher-priority task τ 2 is released since τ 4 inherits the priority of τ 1 , the maximum priority in the system, during the interval [2,4). As a result, the unrelated task τ 3 is preempted instead, similar to the eager preemption policy in the case of non-preemptive sections as illustrated in Figure 5.…”

“…That is, in contrast to suspension-based locks, spin locks do not cause additional context switches. 4 However, the use of spin locks does not necessarily imply the absence of preemptions altogether; preemptable spin locks permit regular preemptions (and thus context switches) as required by the scheduler during certain phases of the protocol. Such preemptions, however, do not constitute voluntary context switches, and a task that is preempted while spinning does not suspend; rather, it remains ready in the scheduler's run-queue.…”

“…In work on the consolidation and integration of legacy systems on multicore platforms, Afshar et al [2,4],…”

“…Multicore platforms also often feature hardware-managed, implicitly shared resources such as last-level caches (LLCs), memory controllers, DRAM banks, etc. ; techniques for managing such hardware resources are not the subject of this survey 2. Notable exceptions include proposals by Chen et al[64] and Shi et al[181].…”