The easiest way to improve the quality and decrease the size of the integrated passive components is to improve their layout. On-wafer CMOS inductors with different layouts of metal coils aimed at optimizing the component characteristics are processed, measured, and analyzed. Narrow extra wires at the edges of spirals and continuous via arrays in the spirals are found to be effective, when peak value of quality factor (Q) and resonance frequency (fres) are considered the critical parameters.