We implanted ultra low doses (2×10 11 cm -2 ) of 121 Sb ions into isotopically enriched 28 Si and find high degrees of electrical activation and low levels of dopant diffusion after rapid thermal annealing. Pulsed Electron Spin Resonance shows that spin echo decay is sensitive to the dopant depths, and the interface quality. At 5.2 K, a spin decoherence time, T 2 , of 0.3 ms is found for profiles peaking 50 nm below a Si/SiO 2 interface, increasing to 0.75 ms when the surface is passivated with hydrogen. These measurements provide benchmark data for the development of devices in which quantum information is encoded in donor electron spins.* Email: T_Schenkel@LBL.gov 1 cond-mat/0507318Spins of electrons bound to donor atoms in silicon at low temperature are promising candidates for the development of quantum information processing devices [1][2][3]. This is due to their long decoherence times, and the potential to leverage fabrication finesse in a silicon transistor paradigm. Recently, relatively long transverse relaxation times (T 2 ) were determined for electron spins in pulsed electron spin resonance (ESR) studies of phosphorous donors in isotopically enriched silicon. Here, donors were present as a random background doping across 28 Si epi layers and T 2 extrapolated to 60 ms for isolated donors [3]. Formation of test devices for quantum information processing requires the integration of individual dopant atoms with a control and readout infrastructure. Donor array fabrication is being addressed by ion implantation [4][5][6] and scanning probe based hydrogen lithography [7,8]. Dopant spacing depends on the choice of entangling interactions between quantum bits (qubits) and ranges from 20 to over 100 nm, corresponding to ultra low ion implantation doses of <10 10 to 2.5×10 11 cm -2 . In this letter, we report on depth profiles and electrical activation following rapid thermal annealing (RTA) of ultra low dose 121 Sb implants and correlate electron spin relaxation times with the dopant distribution below an interface and with the interface quality.We processed wafers with 10 μm thick, 28 Si enriched epi layers (500 ppm 29 Si) on p-type natural silicon (100) and natural silicon control wafers (100), both with impurity concentrations ≤10 14 cm -3 . Standard CMOS processes were followed for formation of 5-10 nm thick thermal SiO 2 . Typical densities of trapped charges and interface traps were 1 to 2×10 11 cm -2 for the thermal oxides. 121 Sb-ion implantation with a dose of 2×10 11 cm -2 was conducted with implant energies of 120 keV and 400 keV. 121 Sb was used to avoid any ambiguity of results due to 31 P background in 28 Si epi layers. RTA for repair of 2 cond-mat/0507318 implant damage and substitutional incorporation of dopants into the silicon lattice, i. e., electrical activation, was performed with an AGA Heatpulse 610. Following annealing, carrier depth profiles were probed with Spreading Resistance Analysis (SRA) [9]. Secondary Ion Mass Spectrometry (SIMS) [9] was used to characterize elemental depth ...