Intel's digital random number generator (DRNG)

Cox, George W.; Dike, C.; Johnston, David

doi:10.1109/hotchips.2011.7477490

Cited by 11 publications

(12 citation statements)

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“…This is evident from the discussion in [5] that the cells are not meant to be used on their own for random numbers. There was extra logic that needed to implemented.…”

Section: Experiments Of the Random Number Cellmentioning

confidence: 92%

“…After running randomness tests such as die hard and runstest in MATLAB, it is observed that the RND cells alone do not pass the tests for their use with cryptographic applications. There is a need for using extra circuitry to make them pass the randomness tests [5]. The design with additional circuitry works because the numbers of ones and zeros being produce are generated in a random like sequence.…”

Section: Layout Level Designmentioning

confidence: 99%

“…In other words, race conditions are unknown states of digital circuits. Race conditions cannot be predicted easily [5].…”

Section: Transistor Level Designmentioning

confidence: 99%

“…A recent random number cell presented in [5] is considered for a full-fledged random number generator implementation in this chapter. The cells on their own are not be able to pass randomness tests.…”

Section: Architecture Of the Proposed Random Number Generator Using Mmentioning

confidence: 99%

“…This has an advantage of using the high density in nanoscale CMOS [10]. The RNG in [5] is used as a case study for this thesis. The design takes advantage of an unstable state of a digital system and it uses the randomness of real phenomena to stabilize it and produce random results.…”

Section: Random Number Generators: a Broad Prospectivementioning

confidence: 99%

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Random Number Generator

2005

Dictionary of Statistics &Amp; Methodology

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“…This is evident from the discussion in [5] that the cells are not meant to be used on their own for random numbers. There was extra logic that needed to implemented.…”

Section: Experiments Of the Random Number Cellmentioning

confidence: 92%

Section: Layout Level Designmentioning

confidence: 99%

“…In other words, race conditions are unknown states of digital circuits. Race conditions cannot be predicted easily [5].…”

Section: Transistor Level Designmentioning

confidence: 99%

Section: Architecture Of the Proposed Random Number Generator Using Mmentioning

confidence: 99%

Section: Random Number Generators: a Broad Prospectivementioning

confidence: 99%

See 3 more Smart Citations

Random Number Generator

2005

Dictionary of Statistics &Amp; Methodology

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Hardware-Accelerated Platforms and Infrastructures for Network Functions: A Survey of Enabling Technologies and Research Studies

2020

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In order to facilitate flexible network service virtualization and migration, network functions (NFs) are increasingly executed by software modules as so-called "softwarized NFs" on General-Purpose Computing (GPC) platforms and infrastructures. GPC platforms are not specifically designed to efficiently execute NFs with their typically intense Input/Output (I/O) demands. Recently, numerous hardwarebased accelerations have been developed to augment GPC platforms and infrastructures, e.g., the central processing unit (CPU) and memory, to efficiently execute NFs. This article comprehensively surveys hardware-accelerated platforms and infrastructures for executing softwarized NFs. This survey covers both commercial products, which we consider to be enabling technologies, as well as relevant research studies. We have organized the survey into the main categories of enabling technologies and research studies on hardware accelerations for the CPU, the memory, and the interconnects (e.g., between CPU and memory), as well as custom and dedicated hardware accelerators (that are embedded on the platforms); furthermore, we survey hardware-accelerated infrastructures that connect GPC platforms to networks (e.g., smart network interface cards). We find that the CPU hardware accelerations have mainly focused on extended instruction sets and CPU clock adjustments, as well as cache coherency. Hardware accelerated interconnects have been developed for on-chip and chip-to-chip connections. Our comprehensive up-to-date survey identifies the main trade-offs and limitations of the existing hardware-accelerated platforms and infrastructures for NFs and outlines directions for future research.

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A Robust and Healthy Against PVT Variations TRNG Based on Frequency Collapse

et al. 2022

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True Random Number Generator (TRNG) is used in many applications, generally for generating random cryptography keys. In this way, the trust of the cryptography system depends on the quality of the random numbers generated. However, the entropy fluctuations produced by external perturbations generate some false positives in the random sequence. These false positives can generate a disastrous scenario, depending on the application. This work presents the results of different tests to demonstrate the robustness and health of the TRNG based on frequency collapse. The TRNG passed all entropy tests provided for NIST SP800-90B and AIS31. The entropy test denotes a 0.9789 minimum entropy normalized and 7.998 Shannon entropy. In addition, the TRNG passes the health tests provided for NIST SP800-90B. The health test shows a number of identical values I v = 0%, I v−1 < 0.004% and a maximum cutoff value M C v = 10 with LM C v = 13 in the repetition count and adaptive proportion tests, respectively. The implementation passed all the statistical tests provided for NIST SP800-22 and AIS20. Besides, the implementation passes the different tests with Process, Voltage, and Temperature (PVT) variations. The TRNG is implemented in a 0.18µm General Purpose (GP) CMOS technology, occupying 25600µm 2 with four entropy sources. Finally, the implementation presents a 7.3 until 9.2-Mb/s of bit rate, 0.56 until 1.88-mW of power consumption, and 77.2 until 204.3-pJ/bit of energy per bit using an entropy source with 16 and 2 delay stages, respectively.

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Intel's digital random number generator (DRNG)

Cited by 11 publications

References 0 publications

Random Number Generator

Random Number Generator

Hardware-Accelerated Platforms and Infrastructures for Network Functions: A Survey of Enabling Technologies and Research Studies

A Robust and Healthy Against PVT Variations TRNG Based on Frequency Collapse

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