Interactive hybrid Control-flow checking method

Abstract

Embedded systems are often used for special purposes. When an embedded system is operating in a critical environment, its reliability should be focused on. One of the methods for improving reliability of embedded systems is Control-flow checking (CFC) of the running program. It is known that the control-flow errors comprise between 33% and 77% of all errors in a computer system [1]. Nowadays there are many controlflow checking methods for different types of computer systems and with various designs. There are hardware checking methods using an external watchdog processor, software methods applied on commercial off-the-shelf processors or hybrid methods. In this paper we are dealing with problems of existing methods, identifying their parameters and presenting a new method of interactive hybrid control-flow checking. This method is a compromise among hybrid methods and tries to optimise the checking speed with high fault coverage.

Control Flow Checking or Not? (for Soft Errors)

“…ASIS [11] uses a hardware signature generator and watchdog monitor to check the control flow of several processors. (3) Hybrid CFC techniques [4,10,12,[34][35][36]42], in general, involve modifications of program code using a compiler, and modifications in the processor hardware, to monitor the control flow. They apply a mix of software and hardware techniques to detect CFEs.…”

“…For example, as shown in Figure 1, CFCSS adds some instructions to assign a variable to a unique value (signature) in each basic block, and also adds instructions in each basic block to check if the control flow is coming from a correct predecessor basic block. Several control flow based soft error protection techniques were developed over the last few decades and span across design layers from hardware [11, 23-25, 31, 32], software [2,3,9,15,28,39,40], and hardware-software hybrid techniques [4,10,12,[34][35][36]42].…”