Interconnect capacitance characterization based on charge based capacitance measurement (CBCM) technique for DFM applications

Abstract

Interconnection parasItIc capacitance is the dominant delay and noise source in modem integrated circuits. This paper presents a test structure and a characterization method based on charge based capacitance measurement technique. The method could be implemented to study the variability of physical parameters such as interlayer dielectric (ILD) thickness and interconnect drawn width reduction, which can in tum be used in process/device modeling for design-for-manufacturing applications.