Interface characteristics of n-n and p-n Ge/SiC heterojunction diodes formed by molecular beam epitaxy deposition

Abstract

In this article, we report on the physical and electrical nature of Ge/SiC heterojunction layers that have been formed by MBE deposition. Using X-ray diffraction, atomic force microscopy and helium ion microscopy, we perform a thorough analysis of how MBE growth conditions affect the Ge layers. We observe the layers developing from independent islands at thicknesses of 100 nm to flat surfaces at 300 nm. The crystallinity and surface quality of the layer is shown to be affected by the deposition parameters and, using a high temperature deposition and a light dopant species, the layers produced have large polycrystals and hence a low resistance. The p-type and n-type layers, 300 nm thick are formed into Ge/SiC heterojunction mesa diodes and these are characterised electrically. The polycrystalline diodes display near ideal diode characteristics (n < 1.05), low on resistance and good reverse characteristics. Current-voltage measurements at varying temperature prove that all the layers have two-dimensional fluctuations in the Schottky barrier height (SBH) due to inhomogeneities at the heterojunction interface. Capacitance-voltage analysis and the SBH size extracted from I-V analysis suggest strongly that interface states are present at the surface causing Fermi-level pinning throughout the bands. A simple model is used to quantify the concentration of interface states at the surface.

The rectenna device: From theory to practice (a review)

“…Instead, a more realistic scenario should be considered where multiple current paths exist flowing over barriers of different barrier height, so modifying this equation that has been the standard for a century or more. The papers by Tung 151,160 and others [155][156][157][158][159] pro-vide a much more rigorous understanding of the Schottky diode and its operation under this inhomogeneous regime. Given the small potential size of a Schottky rectenna, the impact of such interface inhomogeneity will be the source of significant device-device variation, and an unpredictability of cut-off frequencies.…”

The Effect of Interfacial Charge on the Development of Wafer Bonded Silicon-on-Silicon-Carbide Power Devices

“…This inhomogeneous interface is likely the source of significant charge trapped at the interface. This has been shown in [7] at the Ge/SiC heterojunction to cause Fermi-level pinning, and hence a conduction band offset very different from that expected. Here, it is expected that a high density of interfacial charge causes band bending, which in such a thin, lightly doped Si layer inverts the doping polarity of the entire layer resulting in the p-type behaviour witnessed.…”

Systematic study of metal-insulator-metal diodes with a native oxide

“…In reality these offsets are affected by Fermi level pinning. 21,22 Figure 3. Results suggest improved rectification performance from the high electron affinity insulators (TiO 2 and Nb 2 O 5 ).…”

“…If we assume that the workfunction of the titanium is the same in both cases as the growth conditions have been kept constant, the alignment of the bands could be dissimilar due to a difference in interface states and hence Fermi level pinning. 21,22 Therefore, the bands have aligned so that to introduce asymmetry as in Figure 1b. Once more, no correlation is seen between asymmetry values and workfunction difference ( Table 3).…”