Interface characterization of ALD deposited Al₂O₃ on GaN by CV method

Abstract

A high dielectric interface quality is the determining factor for high power GaN metal oxide semiconductor field‐ effect transistor (MOSFET) devices. We characterized 100 Å thick aluminum oxide (Al2O3) films deposited by ALD on MOCVD grown undoped GaN on sapphire. First we measured the leakage current and densification behaviour of the dielectric after annealing at different temperatures up to 900 °C and determined the polycrystalline phase change to be around 800 °C. Further we characterized the interface charges of both films according to the flatband shift, induced by over‐band gap UV light, showing the lowest interface charge density of 1.27 × 1011 cm–2 after thermal treatment at 850 °C. Additionally, we measured the AC conductivity and calculated the interface states density (Dit) of the upper half of the GaN bandgap, showing the lowest Dit of around 2×1010 cm–2 eV–1 at 2 eV above the valence band, while it remains higher around the band edge at 2.8×1011 cm–2 eV–1, after annealing at 750 °C. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

RECESSED-GATE NORMALLY-OFFGaNMOSFET TECHNOLOGIES

“…effectively reduce the trap density which results in improved device reliability. In addition, according to our previous experiment 13 , the interface trap density was high throughout the whole band-gap energy for the non-annealed sample. But the trap density near the mid-gap was effectively decreased after annealing the sample at a high temperature above 750°C.…”

Trapping effects in Al2O3/AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistor investigated by temperature dependent conductance measurements

“…A decrease of the trap density after high-temperature annealing ͑700-1100°C͒ was observed. [3][4][5]7 We reported recently on the trapping effects in Al 2 O 3 / AlGaN/ GaN/ Si MISHFETs, using frequency dependent conductance measurements. We found two different types of traps, slow with a time constant T of about 8 ms and fast with T Х͑0.1-1͒ s. 9 Unfortunately, the capacitance and/or conductance measurements performed at room temperature allowed for the extraction of only limited data about the trap distribution within the semiconductor bandgap, especially in GaN.…”

“…Therefore properties of simple MIS capacitors using SiO 2 , Si 3 N 4 , and Al 2 O 3 on n-GaN were investigated. [3][4][5][6][7][8] Trapping state densities in a relatively wide range of 10 10 -10 13 cm −2 eV −1 without preference for a particular insulator were obtained. A decrease of the trap density after high-temperature annealing ͑700-1100°C͒ was observed.…”

Density of Traps at the Insulator/III-N Interface of GaN Heterostructure Field-Effect Transistors Obtained by Gated Hall Measurements

“…The conventional capacitance voltage (C-V)-based Terman method and the conductance method are applicable for the extraction of Dit at the interface between bulk semiconductors and insulators and have indeed been applied to bulk GaN [7,8]. Shallow Dit profiles were evaluated from conductance and C-V measurements at HFET structure interfaces [9,10], but, in our samples, no frequency dependence of the C-V curves was found in the 1 MHZ to 1 kHz range, so these methods cannot be applied.…”