Interface Engineering for Atomic Layer Deposited Alumina Gate Dielectric on SiGe Substrates

Zhang, L.; Guo, Yuzheng; Hassan, Vinayak Vishwanath; Tang, Kechao; Foad, M.A.; Woicik, J. C.; Pianetta, P.; Robertson, John; McIntyre, Paul C.

doi:10.1021/acsami.6b03331

Cited by 35 publications

(45 citation statements)

References 35 publications

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“…Recently, there have been studies on controlling the growth of both Si and Ge oxides at the SiGe/high-k (Al 2 O 3 ) interface by manipulating the composition of the metal contact layer, plasma postnitridation, preatomic layer deposition (ALD) dosing, and wet chemical sulfur passivation. [12][13][14][15][16][17] with the ratio of 1:1:500 for 2 min followed by rinsing with UPW for 1 min and blown dry with N 2 . Oxides were removed by immersion in HF:HCl:H 2 O with the ratio of 1:3:300 for 5 min.…”

Section: Introductionmentioning

confidence: 99%

Reaction of aqueous ammonium sulfide on SiGe 25%

Heslop

Peckler

Muscat

2017

Journal of Vacuum Science &Amp; Technology A: Vacuum, Surfaces, and Films

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SiGe 25% substrates were treated with aqueous solutions of ammonium sulfide with and without added acid to understand the adsorption of sulfur on the surface. X-ray photoelectron spectroscopy showed no sulfide layer was deposited from aqueous (NH 4 ) 2 S alone and instead both Si and Ge oxides formed during immersion in the sulfur solution. The addition of hydrofluoric and hydrochloric acids dropped the pH from 10 to 8 and deposited sulfides, yet increased the oxide coverage on the surface and preferentially formed Ge oxides. The sulfur coverage grew with increasing concentrations of acid in the aqueous (NH 4 ) 2 S. The simultaneous deposition of O and S is suspected to be the result of oxidized sulfur species in solution. Metal-insulator-semiconductor capacitor (MISCAP) devices were fabricated to test the electrical consequences of aqueous ammonium sulfide wet chemistries on SiGe. MISCAPs treated with acidic ammonium sulfide solutions contained fewer interface defects in the valence band region. The defect density (D it ) was on the order of 10 þ12 cm -2 eV À1. The flat band voltage shift was lower after the acidic ammonium sulfide treatment, despite the presence of surface oxides. Adsorption of S and potentially O improved the stability of the surface and made it less electrically active.

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Section: Introductionmentioning

confidence: 99%

Reaction of aqueous ammonium sulfide on SiGe 25%

Heslop

Peckler

Muscat

2017

Journal of Vacuum Science &Amp; Technology A: Vacuum, Surfaces, and Films

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“…The O 3 + site lies between the sites labelled Ge2 and Ge3. These VAP defects have been studied by Binder et al [22,23] and Li and Lin [24][25][26].…”

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confidence: 99%

Yttrium passivation of defects in GeO2 and GeO2/Ge interfaces

Robertson

2017

Applied Physics Letters

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Alloying amorphous GeO 2 with Y 2 O 3 has been found experimentally to improve its chemical stability and electrical reliability as a gate dielectric in Ge-based field effect transistors. The mechanism is explained here based on density functional calculations. The GeO 2 reliability problem is correlated with oxygen deficiency defects which generate gap states near the band-edges of the underlying Ge. These can be passivated through Y doping. This shifts the defect gap state out of the gap up into the GeO 2 conduction band, thus effectively passivating gap states in the GeO 2 layer.

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“…2d). Furthermore, when ozone is evenly dispersed into HfO 2 by dosing after every 5 cycles, there is a 63% decrease in D it to 1.5x10 12 In the second remote scavenging example, a remote gettering gate Al metal is employed which is separated from the gate oxide with a thin Ni layer as shown in Fig. 2j.…”

Section: Resultsmentioning

confidence: 99%

“…High transconductance in SiGe channels was reported by Hashemi et al via replacement high k/metal gate or interlayer oxides [10][11] . While SiGe transistors with high-k dielectrics are being actively developed for commercial high speed, low power electronic devices; the practical integration of SiGe as a top surface channel in complementary metal oxide semiconductor (CMOS) transistors is hindered by poor interface formation between the gate oxide and SiGe primarily due to GeO x formation [12][13] . Elimination of unstable GeO x species may be possible with Si cap layers epitaxially grown on SiGe channels for planar devices; however it may be problematic for gate-all-around devices or FinFETs due to space constraints and the limitation in Si ALDs which may have low mobility due to defects 14 .…”

Section: Introductionmentioning

confidence: 99%

“…Elimination of unstable GeO x species may be possible with Si cap layers epitaxially grown on SiGe channels for planar devices; however it may be problematic for gate-all-around devices or FinFETs due to space constraints and the limitation in Si ALDs which may have low mobility due to defects 14 . Previous studies on defect suppression at the gate oxide-SiGe interface have included pre ALD passivation with nitrides [15][16] and sulfur 17 and post ALD selective oxygen scavenging with physical vapor deposited (PVD) gettering metal gates 12,18 . However, the interfaces are still degraded mainly by Ge out-diffusion 13 during ALD at elevated temperatures.…”

Section: Introductionmentioning

confidence: 99%

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Understanding the Mechanism of Electronic Defect Suppression Enabled by Nonidealities in Atomic Layer Deposition

et al. 2019

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Silicon germanium (SiGe) is a multi-functional material considered for quantum computing, neuromorphic devices and CMOS transistors. However, implementation of SiGe in nano-scale electronic devices necessitates suppression of surface states dominating on electronic properties. The absence of a stable and passive surface oxide for SiGe results formation of charge traps at the SiGe -oxide interface induced by GeO x . In an ideal ALD process in which oxide is grown layer-by-layer, the GeO x formation should be prevented with selective surface oxidation (i.e. formation of an SiO x interface) by controlling oxidant dose in first few ALD cycles of the oxide deposition on SiGe. However, in a real ALD process, the interface evolves during entire ALD oxide deposition due to diffusion of reactant species through the gate oxide. In this work, this diffusion process in non-ideal ALD is investigated and exploited: the diffusion through the oxide during ALD is utilized to passivate the interfacial defects by employing ozone as a secondary oxidant. Periodic ozone exposure during gate oxide ALD on SiGe is shown to reduce the integrated trap density (D it ) across the band gap by nearly an order of magnitude in Al 2 O 3 (< 6×10 10 cm -2 ) and in HfO 2 (< 3.9×10 11 cm -2 ) by forming a SiO x rich interface on SiGe. Depletion of Ge from the interfacial layer (IL) by enhancement of volatile GeO x formation and consequent desorption from the SiGe with ozone insertion during ALD growth process is confirmed by electron energy loss spectroscopy (STEM-EELS) and hypothesized to be the mechanism for reduction of the interfacial defects. In this work, the nanoscale mechanism for defect suppression at SiGe oxide interface is demonstrated which is engineering of diffusion species in ALD process due to facile diffusion of reactant species in non-ideal ALD.

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Interface Engineering for Atomic Layer Deposited Alumina Gate Dielectric on SiGe Substrates

Cited by 35 publications

References 35 publications

Reaction of aqueous ammonium sulfide on SiGe 25%

Reaction of aqueous ammonium sulfide on SiGe 25%

Yttrium passivation of defects in GeO2 and GeO2/Ge interfaces

Understanding the Mechanism of Electronic Defect Suppression Enabled by Nonidealities in Atomic Layer Deposition

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