Interface Properties of 4H-SiC (&lt;inline-formula&gt; &lt;tex-math notation="LaTeX"&gt;$11\bar {2}0$ &lt;/tex-math&gt;&lt;/inline-formula&gt;) and (&lt;inline-formula&gt; &lt;tex-math notation="LaTeX"&gt;$1\bar {1}00$ &lt;/tex-math&gt;&lt;/inline-formula&gt;) MOS Structures Annealed in NO

Nakazawa, Seiya; Okuda, Takashi; Suda, Jun; Nakamura, Takashi; Kimoto, Tsunenobu

doi:10.1109/ted.2014.2352117

Cited by 87 publications

(56 citation statements)

References 34 publications

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“…This results in an increase in the occupancy of traps with carriers that have a sufficiently high energy to enable a capture/emission process. 48 These results can also be explained by correlating the existence of slow and fast interface states that have different time constants that only begin to interact with semiconductor carriers at high temperatures, 49 which is in agreement with the observation of the SiO 2 /SiC interface annealed in nitrogen rich environments. 50…”

Section: G Interface Trap Density D Itsupporting

confidence: 67%

Instability of phosphorous doped SiO2 in 4H-SiC MOS capacitors at high temperatures

Idris

Weng

Chan

et al. 2016

Journal of Applied Physics

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In this paper, the effect of inclusion of phosphorous (at a concentration below 1%) on the high temperature characteristics (up to 300 C) of the SiO 2 /SiC interface is investigated. Capacitance-voltage measurements taken for a range of frequencies have been utilized to extract parameters including flatband voltage, threshold voltage, effective oxide charge, and interface state density. The variation of these parameters with temperature has been investigated for bias sweeps in opposing directions and a comparison made between phosphorous doped and as-grown oxides. At room temperature, the effective oxide charge for SiO 2 may be reduced by the phosphorous termination of dangling bonds at the interface. However, at high temperatures, the effective charge in the phosphorous doped oxide remains unstable and effects such as flatband voltage shift and threshold voltage shift dominate the characteristics. The instability in these characteristics was found to result from the trapped charges in the oxide (610 12 cm À3) or near interface traps at the interface of the gate oxide and the semiconductor (10 12-10 13 cm À2 eV À1). Hence, the performance enhancements observed for phosphorous doped oxides are not realised in devices operated at elevated temperatures.

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Section: G Interface Trap Density D Itsupporting

confidence: 67%

Instability of phosphorous doped SiO2 in 4H-SiC MOS capacitors at high temperatures

Idris

Weng

Chan

et al. 2016

Journal of Applied Physics

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“…In fact, by employing the C-ψ method, it was possible to make a correct determination of the D it and, hence, to establish a correlation between the D it and the field effect mobility µ FE . [38], as shown in Figure 5.…”

Section: Processmentioning

confidence: 84%

“…After the mentioned clarifications on the experimental methods to determine both the interface state density and the MOSFET channel mobility, it is possible to try to draw a correlation between the µ FE and the D it . Figure 4 shows the data obtained from Nakazawa et al [38] correlating the µ FE and the total amount of the interface states N it (the energy integral of the D it ). As can be seen, unlike the conventional characterization methods (e.g., 1 MHz conductance method and high-low), a nice correlation of the peak mobility µ FE with the reverse of the interface trap density (1/N it ) is visible when the C-ψ method is used for the quantification of D it .…”

Section: Processmentioning

confidence: 99%

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Characterization of SiO2/4H-SiC Interfaces in 4H-SiC MOSFETs: A Review

2019

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This paper gives an overview on some state-of-the-art characterization methods of SiO2/4H-SiC interfaces in metal oxide semiconductor field effect transistors (MOSFETs). In particular, the work compares the benefits and drawbacks of different techniques to assess the physical parameters describing the electronic properties and the current transport at the SiO2/SiC interfaces (interface states, channel mobility, trapping phenomena, etc.). First, the most common electrical characterization techniques of SiO2/SiC interfaces are presented (e.g., capacitance- and current-voltage techniques, transient capacitance, and current measurements). Then, examples of electrical characterizations at the nanoscale (by scanning probe microscopy techniques) are given, to get insights on the homogeneity of the SiO2/SiC interface and the local interfacial doping effects occurring upon annealing. The trapping effects occurring in SiO2/4H-SiC MOS systems are elucidated using advanced capacitance and current measurements as a function of time. In particular, these measurements give information on the density (~1011 cm−2) of near interface oxide traps (NIOTs) present inside the SiO2 layer and their position with respect to the interface with SiC (at about 1–2 nm). Finally, it will be shown that a comparison of the electrical data with advanced structural and chemical characterization methods makes it possible to ascribe the NIOTs to the presence of a sub-stoichiometric SiOx layer at the interface.

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“…When a trench MOSFET is fabricated on a mass production commercial Si-faced SiC wafer, the MOS channel surface is formed at one of the a-face, m-face, or the face between them. Although the a-face and m-face reportedly show higher mobility than the Si or C faces, less is known about the characteristics of the gate interface compared to the Si or C faces [13]. Especially, there are no reports describing the anisotropy of the nitridation status of the m-face after the NO-POA process, which has a direct impact on mobility [14].…”

Section: Introductionmentioning

confidence: 99%

Analysis of Nitrogen State on MOS Interface of 4H-SiC m-Face after Nitric Oxide Post Oxidation Annealing (NO-POA)

Hamada

Mikami

Naruoka

et al. 2017

e-J. Surf. Sci. Nanotech.

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It is known that the interface nitrogen density of the 4H-SiC Si-face, C-face, and a-face increases as a result of the NO-POA process, that the electron mobility increases as the nitrogen density increases, and that each face has a different interface nitrogen saturation density. In contrast, the anisotropy of the nitridation characteristics of the m-face, which is regarded as a promising channel for high-performance trench MOSFETs, is not well known. To identify the nitridation status of the m-face after NO-POA, the MOS interface structures with a SiO2 formed on m-face by CVD and treated by NO-POA was investigated by SIMS, HAXPES, XPS, and XAFS. In the same way as the other faces, it was found that the nitrogen segregates on the SiO2/SiC MOS interface, that most of the nitrogen combines with Si, and that the interface nitrogen density has a unique saturation value. The nitrogen density saturation value on the m-face measured by SIMS was 9.8 × 10 14 cm −2 . This value is approximately 1.5 times the exposed carbon density on the top surface of the m-face.

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Interface Properties of 4H-SiC (<inline-formula> <tex-math notation="LaTeX">$11\bar {2}0$ </tex-math></inline-formula>) and (<inline-formula> <tex-math notation="LaTeX">$1\bar {1}00$ </tex-math></inline-formula>) MOS Structures Annealed in NO

Cited by 87 publications

References 34 publications

Instability of phosphorous doped SiO2 in 4H-SiC MOS capacitors at high temperatures

Instability of phosphorous doped SiO2 in 4H-SiC MOS capacitors at high temperatures

Characterization of SiO2/4H-SiC Interfaces in 4H-SiC MOSFETs: A Review

Analysis of Nitrogen State on MOS Interface of 4H-SiC m-Face after Nitric Oxide Post Oxidation Annealing (NO-POA)

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