Interface traps density of anodic porous alumina films of different thicknesses on Si

Θεοδωροπούλου, Μαρία; Karahaliou, P. K.; Georga, S. N.; Krontiras, C. A.; Pisanias, M. N.; Kokonou, M.; Nassiopoulou, A. G.

doi:10.1088/1742-6596/10/1/055

Cited by 10 publications

(7 citation statements)

References 8 publications

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“…21 Similarly, the capacitance also increases in the depletion region with decreasing frequency due to recombination and generation from the interface states. 28 This frequency dispersion in C-V characteristics is negligible in the inversion region. Figure 7 shows the current-voltage characteristics under positive and negative biases at room temperature for samples prepared at different ALD temperatures.…”

Section: Resultsmentioning

confidence: 93%

Influence of Atomic Layer Deposition Temperatures on TiO₂/n-Si MOS Capacitor

Wei

Hossain

Garces

et al. 2013

ECS J. Solid State Sci. Technol.

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This paper reports on the influence of deposition temperature on the structure, composition, and electrical properties of TiO 2 thin films deposited on n-type silicon (100) by plasma-assisted atomic layer deposition (PA-ALD). TiO 2 layers ∼20 nm thick, deposited at temperatures ranging from 100 to 300 • C, were investigated. Samples deposited at 200 • C and 250 • C had the most uniform coverage as determined by atomic force microscopy. The average carbon concentration throughout the oxide layer and at the TiO 2 /Si interface was lowest at 200 • C. Metal oxide semiconductor capacitors (MOSCAPs) were fabricated, and profiled by capacitance-voltage techniques. The sample prepared at 200 • C had negligible hysteresis (from a capacitance-voltage plot) and the lowest interface trap density (as extracted using the conductance method). Current-voltage measurements were carried out with top-to-bottom structures. At −2 V gate bias voltage, the smallest leakage current was 1.22 × 10 −5 A/cm 2 for the 100 9 and smaller leakage current density are highly desirable. The insulator deposition temperatures should be below 500• C, because capacitors are expected to be deposited after transistors formation.10 However, further research on the high dielectric materials is needed to fulfill those requirements.In the present study, plasma-assisted atomic layer deposition (PA-ALD) was employed to deposit thin insulating TiO 2 films, because it offers excellent atomic level control of layer thickness with good uniformity and conformality.11 With an O 2 plasma, the deposition can be conducted at a lower temperature and with a shorter purge time in cold-wall reactors than a conventional thermal ALD system. 12These characteristics are particularly suitable for growing capacitor dielectrics for use in DRAM, as it uses a three dimensional structure with a high aspect ratio to increase the effective surface area. 13The present work reports on the impact of the deposition temperature on the properties of TiO 2 films prepared by PA-ALD and on the performance of said films in silicon MOSCAPs. By correlating the oxide structure, surface morphology and impurity concentration with electrical properties (hysteresis, interface trap density and leakage current), an optimal deposition temperature is identified. ExperimentalTiO 2 ALD Film growth and metal contact deposition.-Before deposition, the n-type Si (100) substrates were cleaned with acetone and isopropyl alcohol (IPA) for 5 minutes at 40• C. TiO 2 was deposited by PA-ALD in an Oxford Instruments FlexAL ALD reactor with tetrakisdimethylamino titanium (TDMAT) kept at 39• C as the titanium precursor, and oxygen plasma as the oxidizing agent. The ALD growth temperatures were 100• C, 150• C and 300• C. All ALD depositions consisted of 400 cycles and each ALD cycle included a 0.4 second dose of TDMAT followed by a 4 second * Electrochemical Society Active Member.z E-mail: edgarjh@ksu.edu purge with Ar gas, and a 3 second exposure to the oxygen plasma followed by a 3 second purge. The plasma power and...

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Section: Resultsmentioning

confidence: 93%

Influence of Atomic Layer Deposition Temperatures on TiO₂/n-Si MOS Capacitor

Wei

Hossain

Garces

et al. 2013

ECS J. Solid State Sci. Technol.

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“…The fracture mechanism, Youngs modulus, hardness, fracture toughness [306] and fracture behavior in cylindrical ordered porous alumina [307] were also investigated. The electrical properties of porous alumina films [298,[308][309][310][311], electron energy-loss, associated with Cherenkov radiation during electron beams traveling parallel to the pores of a porous alumina membrane [312], and surface roughness factors of the film [313], were also studied. Contact angle studies on porous alumina were employed to characterize the liquid/surface interactions at the nanoscale and wetting properties of membranes in contact with different solvents and liquids [314].…”

Section: Miscellaneous Properties Of Anodic Porous Aluminamentioning

confidence: 99%

“…Apart from high-purity aluminum foil, the most frequently used starting materials for the anodizing of aluminum have included sputtered or evaporated aluminum on various substrates, including soda-lime glass covered with a tin-doped indium oxide (ITO) [213,363,[458][459][460][461][462][463][464][465][466][467][468], Si [298,[310][311][312]321,322,[468][469][470][471][472][473][474][475][476][477][478][479][480][481][482][483][484][485], Ti [486], InP [487] and GaAs [488]. The transfer of nanopore order from anodic porous alumina to semiconductor materials (e.g., Si) is of special interest from the point of view of integrating AAO with silicon circuit industrial processes, and the potential application of such structures as biosensors, bioreactors, and magnetic recording media.…”

Section: )mentioning

confidence: 99%

Highly Ordered Anodic Porous Alumina Formation by Self‐Organized Anodizing

Sulka

2008

Nanostructured Materials in Electrochemistry

237

298

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“…Both samples were characterized by C-V and G-V measurements, performed in the voltage range of +1.0 V to -3.0 V, in steps of 0.05 V, and in the frequency range of 1 MHz to 100 Hz. The typical form of C-V and G-V curves of a MIS structure was obtained [10,11].…”

Section: Electrical Characterizationmentioning

confidence: 99%

“…3 Results and discussion No frequency dispersion is observed in the obtained C-V characteristics for both samples. The interface trap density D it was calculated following the Conductance method [1,11]. For that purpose the G p /ω versus ω curves were plotted, in the depletion region.…”

Section: Electrical Characterizationmentioning

confidence: 99%

Porous anodic alumina thin films on Si: interface characterization

Gianneta

Nassiopoulou

Krontiras

et al. 2008

Phys. Status Solidi (c)

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The effect of bathocuproine (BCP) on the optical and electrical properties of organic planar heterojunction photovoltaic cells is quantified by current–voltage characterization under 1 sun AM 1.5D simulated solar illumination and spectral response at short‐circuit conditions. By inserting a 10 nm BCP layer in an indium tin oxide (ITO)/subphthalocyanine (SubPc)/buckminsterfullerene (C60)/BCP/Al thin‐film structure, an increase in power‐conversion efficiency from 0.05 to 3.0% is observed, mostly reflected in the enhanced open‐circuit voltage up to 920 mV. Furthermore, the incorporation of a 10‐nm BCP layer in an ITO/C60/BCP/Al structure leads to an increase in built‐in potential from 250 to 850 mV, as demonstrated by electroabsorption. It is argued that BCP passivates C60 such that a 10‐nm layer provides a sufficient buffer layer that prohibits Al contacting the C60 where it would otherwise create donor states.

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Interface traps density of anodic porous alumina films of different thicknesses on Si

Cited by 10 publications

References 8 publications

Influence of Atomic Layer Deposition Temperatures on TiO₂/n-Si MOS Capacitor

Influence of Atomic Layer Deposition Temperatures on TiO₂/n-Si MOS Capacitor

Highly Ordered Anodic Porous Alumina Formation by Self‐Organized Anodizing

Porous anodic alumina thin films on Si: interface characterization

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Interface traps density of anodic porous alumina films of different thicknesses on Si

Cited by 10 publications

References 8 publications

Influence of Atomic Layer Deposition Temperatures on TiO2/n-Si MOS Capacitor

Influence of Atomic Layer Deposition Temperatures on TiO2/n-Si MOS Capacitor

Highly Ordered Anodic Porous Alumina Formation by Self‐Organized Anodizing

Porous anodic alumina thin films on Si: interface characterization

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Influence of Atomic Layer Deposition Temperatures on TiO₂/n-Si MOS Capacitor

Influence of Atomic Layer Deposition Temperatures on TiO₂/n-Si MOS Capacitor