2019
DOI: 10.1002/pssa.201900757
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Interfacial Impurities and Their Electronic Signatures in High‐Voltage Regrown Nonpolar m‐Plane GaN Vertical p–n Diodes

Abstract: This is the author manuscript accepted for publication and has undergone full peer review but has not been through the copyediting, typesetting, pagination and proofreading process, which may lead to differences between this version and the Version of Record. Please cite this article as

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Cited by 16 publications
(7 citation statements)
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“…Observations of Si contaminants and other impurities on the surface of GaN have been reported by numerous investigators. The presence of Si on GaN was detected after exposure to the laboratory environment, after wet chemical etching, after plasma-based dry etching, ,, and even during in situ MOCVD processes involving Si-containing reactor parts. , To elucidate and quantify various mechanisms of Si contamination, we treated the as-grown GaN epilayers with different processes that could potentially introduce Si. Afterward, we performed regrowth of GaN on the treated surfaces and studied the concentration and profile of Si impurities at the (now) buried interfaces.…”
Section: Resultsmentioning
confidence: 99%
“…Observations of Si contaminants and other impurities on the surface of GaN have been reported by numerous investigators. The presence of Si on GaN was detected after exposure to the laboratory environment, after wet chemical etching, after plasma-based dry etching, ,, and even during in situ MOCVD processes involving Si-containing reactor parts. , To elucidate and quantify various mechanisms of Si contamination, we treated the as-grown GaN epilayers with different processes that could potentially introduce Si. Afterward, we performed regrowth of GaN on the treated surfaces and studied the concentration and profile of Si impurities at the (now) buried interfaces.…”
Section: Resultsmentioning
confidence: 99%
“…The origin of the leakage current in these regrown nonplanar p-GaN structures has been recently revealed [105], as being related to the n + -type interfacial impurities (e.g. Si, O, C) introduced in the regrowth process [106][107][108][109][110][111][112].…”
Section: Vertical Power Finfetsmentioning
confidence: 99%
“…For example, the high density of Si is detrimental to the power devices and causes field crowding and premature breakdown when the p-n junction is located near the regrowth interface because Si is an n-type dopant in GaN. However, a moderate Si concentration (lower than 5 × 10 17 cm −3 ) is benign to the device leakage current and breakdown voltage [37]. Several groups have attempted to alleviate or remove ICP-induced damage using thermal annealing, wet chemical treatment, and low-power etching.…”
Section: Etching Damage and Materials Characterizationmentioning
confidence: 99%