Introducing crystalline rare‐earth oxides into Si technologies

Abstract

The ability to integrate crystalline metal oxide dielectric barrier layers into silicon structures can open the way for a variety of novel applications which enhances the functionality and flexibility ranging from high‐K replacements in future MOS devices to oxide/silicon/oxide heterostructures for nanoelectronic application in quantum‐effect devices. We present results for crystalline gadolinium oxides on silicon in the cubic bixbyite structure grown by solid source molecular beam epitaxy. Additional oxygen supply during growth improves the dielectric properties significantly. Experimental results for Gd2O3‐based MOS capacitors grown under optimized conditions show that these layers are excellent candidates for application as very thin high‐K materials replacing SiO2 in future MOS devices. Epitaxial growth of lanthanide oxides on silicon without any interfacial layer has the advantage of enabling defined interfaces engineering. We will show that the electrical properties of epitaxial Gd2O3 thin films on Si substrates can further be improved significantly by an atomic control of interfacial structures. Finally, we will present a new approach for nanostructure formation which is based on solid‐phase epitaxy of the Si quantum‐well combined with simultaneous vapor‐phase epitaxy of the insulator on top of the quantum‐well. Ultra‐thin single‐crystalline Si buried in a single‐crystalline insulator matrix with sharp interfaces was obtained by this approach on Si(111). In addition, structures consisting of a single‐crystalline oxide layer with embedded Si nanoclusters for memory applications will also be demonstrated. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Epitaxial Zintl aluminide SrAl4grown on a LaAlO3substrate

“…6 While several different crystalline oxides can be grown on semiconductors, the growth of semiconductors on oxides usually results in polycrystalline growth and/or three-dimensional (3D) growth modes. 8 10,11 An important advance in this field was the realization of so-called crystalline oxide on semiconductors (COS) by McKee et al 12 This group used an interface with the composition of Zintl-phase SrSi 2 with a thickness of one-half monolayer to grow epitaxial SrTiO 3 on silicon substrates. 13 In this sense, Zintl-Klemm interfaces between oxides and semiconductors are ideal candidates to enable wetting, thus minimizing interfacial energy.…”

Crystalline Nanoscale M<SUB>2</SUB>O<SUB>3</SUB> (M=Gd, Nd) Thin Films Grown by Molecular Beam Epitaxy on Si(111)

“…5 7,8) Despite the epitaxial growth of these M 2 O 3 oxides, a systematic characterization of their crystal structures and orientation relationships with Si substrates using X-ray diffraction has not yet been well developed. This is mainly due to the experimental complications in directly characterizing the interface matching using the X-ray diffraction from in-plane direction, although basic knowledge of either the grown oxides or the substrates can be provided independently from out-of-plane direction.…”

Enhanced dielectric properties of nitrogen doped epitaxial Gd2O3 thin films on Si

“…It has been demonstrated in case of molecular beam epitaxy (MBE) grown LnO thin films that additional oxygen supply during growth often facilitates reduction of V Os [9,13]. However, continuous increase in the oxygen partial pressure ( which have been attempted to compensate such defects, often degrade the dielectric properties of such heterostructures due to the formation of an interfacial layer with lower κ values [14,15].…”

“…Epitaxial layers of various insulating binary lanthanide oxides (LnOs) which offer superior thermal and thermodynamic stabilities in contact with Si, large band gap, and band offset to Si, in addition to suitably large κ values, have been considered as potential candidates for the 2 nd generation of high-κ dielectric materials to continue the downscaling of CMOS devices [4,9]. Nevertheless, despite their excellent microstructural qualities, most of these oxides suffer from poor electrical properties, such as high leakage current density, instability in the threshold voltage and poor reliability, owing to the number of defects generated during either the layer growth or typical CMOS process steps [10].…”