Inverse memrsitor emulator active Realizations

Hezayyin, Haneen G.; Khalil, Nariman A.; Madian, Ahmed H.

doi:10.1109/niles50944.2020.9257961

Cited by 8 publications

(4 citation statements)

References 16 publications

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“…Table 1 vividly demonstrates the superior design of the proposed floating inverse memristor emulator compared to existing counterparts. In contrast to inverse memristor emulators cited in [10][11][12], the presented emulator achieves a floating architecture without the need for any floating elements, distinguishing it from [9,11,12]. Moreover, the reported emulator eschews reliance on external voltage multipliers, such as the AD633 IC, rendering it more area-efficient than emulators in [11,12].…”

Section: Introductionmentioning

confidence: 98%

“…In contrast to inverse memristor emulators cited in [10][11][12], the presented emulator achieves a floating architecture without the need for any floating elements, distinguishing it from [9,11,12]. Moreover, the reported emulator eschews reliance on external voltage multipliers, such as the AD633 IC, rendering it more area-efficient than emulators in [11,12]. Notably, the maximum operating frequency of the provided inverse memristor surpasses all existing emulator circuits, exhibiting satisfactory frequency response in both incremental and decremental casesa feature lacking in emulators from [10,13].…”

Section: Introductionmentioning

confidence: 99%

“…Consequently, circuit designers and theorists have shown little interest in exploring its properties and potential realization approaches. Nevertheless, literature does document some circuit configurations [9][10][11][12][13][14] for the inverse memristor emulator, as detailed in Table 1.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Integrable emulation of a floating incremental/decremental inverse memristor for memristor bandwidth extension

Bhardwaj,

Narayana,

Kalra

et al. 2024

Journal of Electrical Engineering

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The article explores the compact emulation of the inverse memristor through a circuit-based approach. It introduces a floating emulator architecture that incorporates a dual output OTA (Operation Transconductance Amplifier) and DVCC (Differential Voltage Current Conveyor), along with two grounded passive elements, to achieve the emulation of an inverse memristor. The utilization of grounded resistance allows for tunability over the realized behaviour. A key contribution of this research is the novel application of the inverse memristor to extend the operating frequency range of any memristor emulator circuit. Validation of the proposed emulator circuit, in both incremental and decremental modes, along with its application, is conducted using PSPICE-generated simulation results in the 0.18 µm TSMC CMOS technology. Additionally, an inverse memristor emulator configuration employing the IC LM13700 is presented, and its functionality is tested through a breadboard implementation.

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Section: Introductionmentioning

confidence: 98%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Integrable emulation of a floating incremental/decremental inverse memristor for memristor bandwidth extension

Bhardwaj,

Narayana,

Kalra

et al. 2024

Journal of Electrical Engineering

View full text Add to dashboard Cite

show abstract

“…19,20 By applying the fractional calculus concept, the modeling and analysis attempts of memelement with fractional order kinetic have been proposed in many previous works. [21][22][23][24] Since a novel circuit element with memory, namely, the inverse memristor, has been recently proposed [25][26][27] and often cited [28][29][30][31] where its behavior can be found/emulated in practice, [32][33][34][35] similarly to the memristor, it is worthy to introduce the fractional order kinetic to this new element and performing the modeling/analysis. By this motivation, the analytical model of inverse memelement which is a super set of inverse memristor, with fractional order kinetic, has been derived in this work.…”

Section: Introductionmentioning

confidence: 99%

Analytical model of inverse memelement with fractional order kinetic

Banchuin

2022

Circuit Theory & Apps

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In this work, the analytical model of inverse memelement with fractional order kinetic has been proposed. The classical yet noncontroversial Caputo fractional derivative has been adopted for modeling such fractional order kinetic due to its simplicity yet accuracy. Based on the proposed model, the analysis of fractional order kinetic inverse memristor has been thoroughly performed where both nonperiodic and periodic excitations have been considered. Analytical formulations of the related parameters, for example, the rate of changes of inverse memristance, area of inverse memristance loop, and area of pinched hysteresis loop, and so on, have been performed. The extension of the proposed model to the fractional inverse memelement has been performed where the fractional inverse memristor has been analyzed. We have found that the inverse memristor still behaves in an opposite manner to the memristor even with the fractional order kinetic. All obtained results have been found to be intuitively applicable to any inverse memelement. The equivalent circuit models of both fractional inverse memristor and fractional inverse memelement have also been presented. This work provides a comprehensive understanding on both inverse memelement with fractional order kinetic and fractional inverse memelement. The realization of the emulator of such inverse memelement with fractional order kinetic and the fractional inverse memelement emulator has been found to be interesting opened research questions.

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On the analytical modeling of fractal memelement and inverse memelement

Banchuin

2024

Circuit Theory & Apps

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SummaryIn this work, an improved analytical model of fractal memelement in which the pinched point shifting has been considered and the original analytical model of fractal inverse memelement have been proposed. These fractal circuit elements are the memelement, and inverse memelement operates based on the principle of electromagnetic in fractal time/space, which must be applied whenever the current flows through fractal media. These models are important because these memory elements can be realized based on the porous material, which is a fractal media. In addition, they can employ self‐similarity, which is hard to be simulated by using the traditional models. This is because such self‐similarity can be well explained by the fractal set‐based model, yet those traditional models are based on the set of real values. Therefore, for deriving the proposed models, the fractal calculus, which is oriented to the fractal set, has been adopted as the mathematical basis. From the analytical and numerical analyses based on the derived models, it has been found that both memelement and inverse memelement can retain their unique frequency characteristics despite being operated based on the abovementioned principle. In addition, their input–output relationships are mathematically differentiable albeit the inputs and outputs themselves are not.

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Inverse memrsitor emulator active Realizations

Cited by 8 publications

References 16 publications

Integrable emulation of a floating incremental/decremental inverse memristor for memristor bandwidth extension

Integrable emulation of a floating incremental/decremental inverse memristor for memristor bandwidth extension

Analytical model of inverse memelement with fractional order kinetic

On the analytical modeling of fractal memelement and inverse memelement

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