Investigating the use of a binary ADC for simultaneous range and velocity processing in a random noise radar

Thorson, T. Joel; Akers, Geoffrey A.

doi:10.1109/naecon.2011.6183113

Cited by 2 publications

(3 citation statements)

References 7 publications

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“…The data set used for this element of the test effort was generated by Lievsay [6] and used in the most recent effort to replace the eight-bit ADC with a binary ADC [3]. The original data was collected by Lievsay using the AFIT RNR with a Tektronix R ⃝ Digital Phosphor Oscilloscope (DPO) 7254 as the eight-bit ADC.…”

Section: Gpu Implementationmentioning

confidence: 99%

“…By parallelizing the correlation algorithm on a GPU, the goal is to bring the processing time to a near real-time application. As discussed in [3], single precision computing is acceptable for AFIT RNR processing. There is no loss of target estimation capability using single precision versus double precision.…”

Section: Gpu Implementationmentioning

confidence: 99%

“…The most recent simultaneous range-velocity processing research at AFIT began the effort of parallelizing the signal processing algorithm [3]. The idea was to reduce the memory required to process the algorithm in order to implement in a GPU.…”

Section: Introductionmentioning

confidence: 99%

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Near real-time simultaneous range and velocity processing in a random noise radar

Thorson

Akers

2012

2012 IEEE Radar Conference

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Abstract-The Air Force Institute of Technology (AFIT) has developed an ultrawideband (UWB) random noise radar (RNR) that operates in the UHF band. The large fractional bandwidth and lack of phase coherency within the AFIT RNR necessitate an alternative to classical Doppler processing for velocity estimation. A time-domain approach to simultaneous range and velocity processing has been implemented in the AFIT RNR but results in significant memory requirements and impractical processing times. This paper presents a method to reduce the twodimensional (2D) processing time by over an order of magnitude by segmenting the signal processing algorithm in order to parallelize on a graphics processing unit (GPU).

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Section: Gpu Implementationmentioning

confidence: 99%

Section: Gpu Implementationmentioning

confidence: 99%